#define likely(x)    __builtin_expect(!!(x), 1)
#define unlikely(x)  __builtin_expect(!!(x), 0)

int test(int a)
{
	if (a < 5)
		return 1;
	else
		return 2;
}

int test_likely(int a)
{
	if (likely(a < 5))
		return 1;
	else
		return 2;
}

int test_unlikely(int a)
{
	if (unlikely(a < 5))
		return 1;
	else
		return 2;
}



Disassembly of section .text:

00000000 <test>:
   0:	37 9c ff f4 	addi sp,sp,-12
   4:	5b 9b 00 08 	sw (sp+8),fp
   8:	5b 9d 00 04 	sw (sp+4),ra
   c:	34 1b 00 0c 	mvi fp,12
  10:	b7 7c d8 00 	add fp,fp,sp
  14:	5b 61 00 00 	sw (fp+0),r1
  18:	2b 62 00 00 	lw r2,(fp+0)
  1c:	34 01 00 04 	mvi r1,4
  20:	48 41 00 03 	bg r2,r1,2c <test+0x2c>
  24:	34 01 00 01 	mvi r1,1
  28:	e0 00 00 02 	bi 30 <test+0x30>
  2c:	34 01 00 02 	mvi r1,2
  30:	2b 9b 00 08 	lw fp,(sp+8)
  34:	2b 9d 00 04 	lw ra,(sp+4)
  38:	37 9c 00 0c 	addi sp,sp,12
  3c:	c3 a0 00 00 	ret

00000040 <test_likely>:
  40:	37 9c ff f4 	addi sp,sp,-12
  44:	5b 9b 00 08 	sw (sp+8),fp
  48:	5b 9d 00 04 	sw (sp+4),ra
  4c:	34 1b 00 0c 	mvi fp,12
  50:	b7 7c d8 00 	add fp,fp,sp
  54:	5b 61 00 00 	sw (fp+0),r1
  58:	2b 61 00 00 	lw r1,(fp+0)
  5c:	34 02 00 04 	mvi r2,4
  60:	ec 41 08 00 	cmpge r1,r2,r1
  64:	b8 20 10 00 	mv r2,r1
  68:	34 01 00 00 	mvi r1,0
  6c:	44 41 00 03 	be r2,r1,78 <test_likely+0x38>
  70:	34 01 00 01 	mvi r1,1
  74:	e0 00 00 02 	bi 7c <test_likely+0x3c>
  78:	34 01 00 02 	mvi r1,2
  7c:	2b 9b 00 08 	lw fp,(sp+8)
  80:	2b 9d 00 04 	lw ra,(sp+4)
  84:	37 9c 00 0c 	addi sp,sp,12
  88:	c3 a0 00 00 	ret

0000008c <test_unlikely>:
  8c:	37 9c ff f4 	addi sp,sp,-12
  90:	5b 9b 00 08 	sw (sp+8),fp
  94:	5b 9d 00 04 	sw (sp+4),ra
  98:	34 1b 00 0c 	mvi fp,12
  9c:	b7 7c d8 00 	add fp,fp,sp
  a0:	5b 61 00 00 	sw (fp+0),r1
  a4:	2b 61 00 00 	lw r1,(fp+0)
  a8:	34 02 00 04 	mvi r2,4
  ac:	ec 41 08 00 	cmpge r1,r2,r1
  b0:	b8 20 10 00 	mv r2,r1
  b4:	34 01 00 00 	mvi r1,0
  b8:	44 41 00 03 	be r2,r1,c4 <test_unlikely+0x38>
  bc:	34 01 00 01 	mvi r1,1
  c0:	e0 00 00 02 	bi c8 <test_unlikely+0x3c>
  c4:	34 01 00 02 	mvi r1,2
  c8:	2b 9b 00 08 	lw fp,(sp+8)
  cc:	2b 9d 00 04 	lw ra,(sp+4)
  d0:	37 9c 00 0c 	addi sp,sp,12
  d4:	c3 a0 00 00 	ret