#define ARM_BUS0_BASE 0x18000000
#define ARM_BUS1_BASE 0x18400000

/* SCU module */
#define APB0_SCU               (ARM_BUS0_BASE + 0x0001C000)
#define SCU_ID                 (*(volatile unsigned long *)(APB0_SCU + 0x00))
#define SCU_REMAP              (*(volatile unsigned long *)(APB0_SCU + 0x04))
#define SCU_PLLCON1            (*(volatile unsigned long *)(APB0_SCU + 0x08))
#define SCU_PLLCON2            (*(volatile unsigned long *)(APB0_SCU + 0x0C))
#define SCU_PLLCON3            (*(volatile unsigned long *)(APB0_SCU + 0x10))
#define SCU_DIVCON1            (*(volatile unsigned long *)(APB0_SCU + 0x14))
#define SCU_CLKCFG             (*(volatile unsigned long *)(APB0_SCU + 0x18))
#define SCU_RSTCFG             (*(volatile unsigned long *)(APB0_SCU + 0x1C))
#define SCU_PWM                (*(volatile unsigned long *)(APB0_SCU + 0x20))
#define SCU_CPUPD              (*(volatile unsigned long *)(APB0_SCU + 0x24))
#define SCU_CHIPCFG            (*(volatile unsigned long *)(APB0_SCU + 0x28))
#define SCU_STATUS             (*(volatile unsigned long *)(APB0_SCU + 0x2C))
#define SCU_IOMUXA_CON         (*(volatile unsigned long *)(APB0_SCU + 0x30))
    

#define SCU_IOMUXB_CON         (*(volatile unsigned long *)(APB0_SCU + 0x34))

#define SCU_GPIOUPCON          (*(volatile unsigned long *)(APB0_SCU + 0x38))
#define SCU_DIVCON2            (*(volatile unsigned long *)(APB0_SCU + 0x3C))


/* Interrupt controller */
#define AHB0_INTC              (ARM_BUS0_BASE + 0x00080000)
#define INTC_SCR0              (*(volatile unsigned long *)(AHB0_INTC + 0x00))
#define INTC_SCR1              (*(volatile unsigned long *)(AHB0_INTC + 0x04))
#define INTC_SCR2              (*(volatile unsigned long *)(AHB0_INTC + 0x08))
#define INTC_SCR3              (*(volatile unsigned long *)(AHB0_INTC + 0x0C))
#define INTC_SCR4              (*(volatile unsigned long *)(AHB0_INTC + 0x10))
#define INTC_SCR5              (*(volatile unsigned long *)(AHB0_INTC + 0x14))
#define INTC_SCR6              (*(volatile unsigned long *)(AHB0_INTC + 0x18))
#define INTC_SCR7              (*(volatile unsigned long *)(AHB0_INTC + 0x1C))
#define INTC_SCR8              (*(volatile unsigned long *)(AHB0_INTC + 0x20))
#define INTC_SCR9              (*(volatile unsigned long *)(AHB0_INTC + 0x24))
#define INTC_SCR10             (*(volatile unsigned long *)(AHB0_INTC + 0x28))
#define INTC_SCR11             (*(volatile unsigned long *)(AHB0_INTC + 0x2C))
#define INTC_SCR12             (*(volatile unsigned long *)(AHB0_INTC + 0x30))
#define INTC_SCR13             (*(volatile unsigned long *)(AHB0_INTC + 0x34))
#define INTC_SCR14             (*(volatile unsigned long *)(AHB0_INTC + 0x38))
#define INTC_SCR15             (*(volatile unsigned long *)(AHB0_INTC + 0x3C))
#define INTC_SCR16             (*(volatile unsigned long *)(AHB0_INTC + 0x40))
#define INTC_SCR17             (*(volatile unsigned long *)(AHB0_INTC + 0x44))
#define INTC_SCR18             (*(volatile unsigned long *)(AHB0_INTC + 0x48))
#define INTC_SCR19             (*(volatile unsigned long *)(AHB0_INTC + 0x4C))
#define INTC_SCR20             (*(volatile unsigned long *)(AHB0_INTC + 0x50))
#define INTC_SCR21             (*(volatile unsigned long *)(AHB0_INTC + 0x54))
#define INTC_SCR22             (*(volatile unsigned long *)(AHB0_INTC + 0x58))
#define INTC_SCR23             (*(volatile unsigned long *)(AHB0_INTC + 0x5C))
#define INTC_SCR24             (*(volatile unsigned long *)(AHB0_INTC + 0x60))
#define INTC_SCR25             (*(volatile unsigned long *)(AHB0_INTC + 0x64))
#define INTC_SCR26             (*(volatile unsigned long *)(AHB0_INTC + 0x68))
#define INTC_SCR27             (*(volatile unsigned long *)(AHB0_INTC + 0x6C))
#define INTC_SCR28             (*(volatile unsigned long *)(AHB0_INTC + 0x70))
#define INTC_SCR29             (*(volatile unsigned long *)(AHB0_INTC + 0x74))
#define INTC_SCR30             (*(volatile unsigned long *)(AHB0_INTC + 0x78))
#define INTC_SCR31             (*(volatile unsigned long *)(AHB0_INTC + 0x7C))

#define INTC_ISR               (*(volatile unsigned long *)(AHB0_INTC + 0x104))
#define INTC_IPR               (*(volatile unsigned long *)(AHB0_INTC + 0x108))
#define INTC_IMR               (*(volatile unsigned long *)(AHB0_INTC + 0x10C))

#define INTC_IECR              (*(volatile unsigned long *)(AHB0_INTC + 0x114))
#define INTC_ICCR              (*(volatile unsigned long *)(AHB0_INTC + 0x118))
#define INTC_ISCR              (*(volatile unsigned long *)(AHB0_INTC + 0x11C))

#define INTC_TEST              (*(volatile unsigned long *)(AHB0_INTC + 0x124))

/* LCD controller */
#define AHB1_LCDC            0x186E8000
#define LCDC_CTRL            (*(volatile unsigned long *)(AHB1_LCDC + 0x00))
#define MCU_CTRL             (*(volatile unsigned long *)(AHB1_LCDC + 0x04))

#define HOR_PERIOD           (*(volatile unsigned long *)(AHB1_LCDC + 0x08))
#define VERT_PERIOD          (*(volatile unsigned long *)(AHB1_LCDC + 0x0C))
#define HOR_PW               (*(volatile unsigned long *)(AHB1_LCDC + 0x10))
#define VERT_PW              (*(volatile unsigned long *)(AHB1_LCDC + 0x14))
#define HOR_ACT              (*(volatile unsigned long *)(AHB1_LCDC + 0x18))
#define VERT_ACT             (*(volatile unsigned long *)(AHB1_LCDC + 0x1C))
#define HOR_BP               (*(volatile unsigned long *)(AHB1_LCDC + 0x20))
#define VERT_BP              (*(volatile unsigned long *)(AHB1_LCDC + 0x24))
#define LINE0_YADDR          (*(volatile unsigned long *)(AHB1_LCDC + 0x28))

#define LINE0_UVADDR         (*(volatile unsigned long *)(AHB1_LCDC + 0x2C))
#define LINE1_YADDR          (*(volatile unsigned long *)(AHB1_LCDC + 0x30))
#define LINE1_UVADDR         (*(volatile unsigned long *)(AHB1_LCDC + 0x34))
#define LINE2_YADDR          (*(volatile unsigned long *)(AHB1_LCDC + 0x38))
#define LINE2_UVADDR         (*(volatile unsigned long *)(AHB1_LCDC + 0x3C))
#define LINE3_YADDR          (*(volatile unsigned long *)(AHB1_LCDC + 0x40))
#define LINE3_UVADDR         (*(volatile unsigned long *)(AHB1_LCDC + 0x44))
#define START_X              (*(volatile unsigned long *)(AHB1_LCDC + 0x48))
#define START_Y              (*(volatile unsigned long *)(AHB1_LCDC + 0x4C))
#define DELTA_X              (*(volatile unsigned long *)(AHB1_LCDC + 0x50))
#define DELTA_Y              (*(volatile unsigned long *)(AHB1_LCDC + 0x54))
#define LCDC_INTR_MASK       (*(volatile unsigned long *)(AHB1_LCDC + 0x58))

#define LCDC_STA             (*(volatile unsigned long *)(AHB1_LCDC + 0x7C))

#define LCD_COMMAND          (*(volatile unsigned long *)(AHB1_LCDC + 0x1000))
#define LCD_DATA             (*(volatile unsigned long *)(AHB1_LCDC + 0x1004))

/* AHB-to-AHB DMA controller */
#define AHB1_DWDMA             0x186F0000
#define DWDMA_SAR(n)         (*(volatile unsigned long *)(AHB1_DWDMA + 0x00 + 0x58*n))
#define DWDMA_DAR(n)         (*(volatile unsigned long *)(AHB1_DWDMA + 0x08 + 0x58*n))
#define DWDMA_LLP(n)         (*(volatile unsigned long *)(AHB1_DWDMA + 0x10 + 0x58*n))
#define DWDMA_CTL_L(n)       (*(volatile unsigned long *)(AHB1_DWDMA + 0x18 + 0x58*n))

#define DWDMA_CTL_H(n)       (*(volatile unsigned long *)(AHB1_DWDMA + 0x1C + 0x58*n))
#define DWDMA_SSTAT(n)       (*(volatile unsigned long *)(AHB1_DWDMA + 0x20 + 0x58*n))
#define DWDMA_DSTAT(n)       (*(volatile unsigned long *)(AHB1_DWDMA + 0x28 + 0x58*n))
#define DWDMA_SSTATAR(n)     (*(volatile unsigned long *)(AHB1_DWDMA + 0x30 + 0x58*n))
#define DWDMA_DSTATAR(n)     (*(volatile unsigned long *)(AHB1_DWDMA + 0x38 + 0x58*n))
#define DWDMA_CFG_L(n)       (*(volatile unsigned long *)(AHB1_DWDMA + 0x40 + 0x58*n))
#define DWDMA_CFG_H(n)       (*(volatile unsigned long *)(AHB1_DWDMA + 0x44 + 0x58*n))

#define DWDMA_SGR(n)         (*(volatile unsigned long *)(AHB1_DWDMA + 0x48 + 0x58*n))
#define DWDMA_DSR(n)         (*(volatile unsigned long *)(AHB1_DWDMA + 0x50 + 0x58*n))

#define DWDMA_RAW_TFR        (*(volatile unsigned long *)(AHB1_DWDMA + 0x2C0))
#define DWDMA_RAW_BLOCK      (*(volatile unsigned long *)(AHB1_DWDMA + 0x2C8))
#define DWDMA_RAW_SRCTRAN    (*(volatile unsigned long *)(AHB1_DWDMA + 0x2D0))
#define DWDMA_RAW_DSTTRAN    (*(volatile unsigned long *)(AHB1_DWDMA + 0x2D8))
#define DWDMA_RAW_ERR        (*(volatile unsigned long *)(AHB1_DWDMA + 0x2E0))

#define DWDMA_STATUS_TFR     (*(volatile unsigned long *)(AHB1_DWDMA + 0x2E8))
#define DWDMA_STATUS_BLOCK   (*(volatile unsigned long *)(AHB1_DWDMA + 0x2F0))
#define DWDMA_STATUS_SRCTRAN (*(volatile unsigned long *)(AHB1_DWDMA + 0x2F8))
#define DWDMA_STATUS_DSTTRAN (*(volatile unsigned long *)(AHB1_DWDMA + 0x300))
#define DWDMA_STATUS_ERR     (*(volatile unsigned long *)(AHB1_DWDMA + 0x308))

#define DWDMA_MASK_TFR       (*(volatile unsigned long *)(AHB1_DWDMA + 0x310))
#define DWDMA_MASK_BLOCK     (*(volatile unsigned long *)(AHB1_DWDMA + 0x318))
#define DWDMA_MASK_SRCTRAN   (*(volatile unsigned long *)(AHB1_DWDMA + 0x320))
#define DWDMA_MASK_DSTTRAN   (*(volatile unsigned long *)(AHB1_DWDMA + 0x328))
#define DWDMA_MASK_ERR       (*(volatile unsigned long *)(AHB1_DWDMA + 0x330))

#define DWDMA_CLEAR_TFR      (*(volatile unsigned long *)(AHB1_DWDMA + 0x338))
#define DWDMA_CLEAR_BLOCK    (*(volatile unsigned long *)(AHB1_DWDMA + 0x340))
#define DWDMA_CLEAR_SRCTRAN  (*(volatile unsigned long *)(AHB1_DWDMA + 0x348))
#define DWDMA_CLEAR_DSTTRAN  (*(volatile unsigned long *)(AHB1_DWDMA + 0x350))
#define DWDMA_CLEAR_ERR      (*(volatile unsigned long *)(AHB1_DWDMA + 0x358))

#define DWDMA_STATUS_INT     (*(volatile unsigned long *)(AHB1_DWDMA + 0x360))

#define DWDMA_REQ_SRC        (*(volatile unsigned long *)(AHB1_DWDMA + 0x368))
#define DWDMA_REQ_DST        (*(volatile unsigned long *)(AHB1_DWDMA + 0x370))
#define DWDMA_S_REQ_SRC      (*(volatile unsigned long *)(AHB1_DWDMA + 0x378))
#define DWDMA_S_REQ_DST      (*(volatile unsigned long *)(AHB1_DWDMA + 0x380))
#define DWDMA_L_REQ_SRC      (*(volatile unsigned long *)(AHB1_DWDMA + 0x388))
#define DWDMA_L_REQ_DST      (*(volatile unsigned long *)(AHB1_DWDMA + 0x390))

#define DWDMA_DMA_CFG        (*(volatile unsigned long *)(AHB1_DWDMA + 0x398))
#define DWDMA_DMA_CHEN       (*(volatile unsigned long *)(AHB1_DWDMA + 0x3A0))