#define F_CPU 8000000UL

#include <util/delay.h>
#include <avr/io.h>
#include <avr/interrupt.h>

uint8_t i; // temp variable
uint8_t al; // ADC low
uint8_t ah; // ADC high

volatile uint8_t timer = 0;

uint8_t checksum = 255;

int main()
{
cli();
	UBRR0H = 0;
	UBRR0L = 1;
	UCSR0B = 0b00001000;
	ADMUX = 0b01000111; // Select A7
	ADCSRA = 0b11000110; // Enable ADC, single conversion, f/64 = 125kHz

	TCCR2A = 0b010; // TOP = OCRA
	TCCR2B = 0b100; // Div 32
	OCR2A = 156;  // 138 = 905Hz interrupts
	TCNT2 = 0;
	TIMSK2 = 0b010; // OCIEA interrupt

sei();
	
	i = 0;

	UDR0 = 0x00; // Send a NULL to start

	for(;;) {
		
		ADMUX = 0b01000110; // A6
		ADCSRA = 0b11000110; // Enable ADC, single conversion, f/64 = 125kHz
		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = ah; // High byte first
		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = al; // High byte first
		while(ADCSRA & 0b01000000); // Wait for conversion to finish (should be done)
		al = ADCL;
		ah = ADCH;
		checksum -= al;
		checksum -= ah;
		
		ADMUX = 0b01000101; // A5
		ADCSRA = 0b11000110; // Enable ADC, single conversion, f/64 = 125kHz
		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = ah; // High byte first
		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = al; // High byte first
		while(ADCSRA & 0b01000000); // Wait for conversion to finish (should be done)
		al = ADCL;
		ah = ADCH;
				checksum -= al;
		checksum -= ah;


		ADMUX = 0b01000000; // A0
		ADCSRA = 0b11000110; // Enable ADC, single conversion, f/64 = 125kHz
		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = ah; // High byte first
		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = al; // High byte first
		while(ADCSRA & 0b01000000); // Wait for conversion to finish (should be done)
		al = ADCL;
		ah = ADCH;
		checksum -= al;
		checksum -= ah;

		
		ADMUX = 0b01000001; // A1
		ADCSRA = 0b11000110; // Enable ADC, single conversion, f/64 = 125kHz
		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = ah; // High byte first
		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = al; // High byte first
		while(ADCSRA & 0b01000000); // Wait for conversion to finish (should be done)
		al = ADCL;
		ah = ADCH;
		checksum -= al;
		checksum -= ah;

		ADMUX = 0b01000010; // A2
		ADCSRA = 0b11000110; // Enable ADC, single conversion, f/64 = 125kHz
		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = ah; // High byte first
		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = al; // High byte first
		while(ADCSRA & 0b01000000); // Wait for conversion to finish (should be done)
		al = ADCL;
		ah = ADCH;
		checksum -= al;
		checksum -= ah;

		
		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = ah; // High byte first
		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = al; // High byte first

		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = checksum; // High byte first
		checksum = 255;
		
		while(timer == 0); // Hold here to enforce 900Hz reading rate
		timer = 0;

		ADMUX = 0b01000111; // A7		
		ADCSRA = 0b11000110; // Enable ADC, single conversion, f/64 = 125kHz
		while(!(UCSR0A & 0b00100000)); // Wait for buffer to be empty
		UDR0 = 0x00; // NULL start

		while(ADCSRA & 0b01000000); // Wait for conversion to finish (should be done)
		al = ADCL;
	        ah = ADCH;
		checksum -= al;
		checksum -= ah;

		
		
	}
	return 1;
}

ISR(TIMER2_COMPA_vect)
{
	timer=1;
}