/**
 * @name PWM configuration
 * @{
 */

#define PWM_NUMOF           (2U)
#define PWM_0_EN            1
#define PWM_1_EN            1
#define PWM_MAX_CHANNELS    1

/* PWM 0 device configuration */
#define PWM_0_DEV           TIM2
#define PWM_0_CHANNELS      1
#define PWM_0_CLK           (32000000U)
#define PWM_0_CLKEN()       (RCC->APB1ENR|= RCC_APB1ENR_TIM2EN)
#define PWM_0_CLKDIS()      (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM2EN))
/* PWM 0 pin configuration */
#define PWM_0_PORT          GPIOC
#define PWM_0_PORT_CLKEN()  (RCC->AHBENR |= RCC_AHBENR_GPIOCEN)
#define PWM_0_PIN_CH0       3
#define PWM_0_PIN_AF        1 //Pin PB_3

/* PWM 1 device configuration */
#define PWM_1_DEV           TIM3
#define PWM_1_CHANNELS      1
#define PWM_1_CLK           (32000000U)
#define PWM_1_CLKEN()       (RCC->APB1ENR |= RCC_APB1ENR_TIM3EN)
#define PWM_1_CLKDIS()      (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM3EN))
/* PWM 1 pin configuration */
#define PWM_1_PORT          GPIOD
#define PWM_1_PORT_CLKEN()  (RCC->AHBENR |= RCC_AHBENR_GPIODEN)
#define PWM_1_PIN_CH0       11
#define PWM_1_PIN_AF        2 //Pin PA_7