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  1. Platform Software Engineer for LTE 4G
  2. Sequans Communications
  3. June 2010 – February 2013 (2 years 9 months)Paris Area, France
  4.  
  5. Work on platform enablement, system and device drivers for LTE multi-processor SoCs, based on ARM946E-S, MIPS24Kc and Lattice Mico32 architectures with eCos RTOS (for baseband CPU) and Linux (for application CPU) as a systems of choice.
  6. - Board bring-up and HW/SW debugging (JTAG, oscilloscope, logic analyzer, HW modications)
  7. - Fully developed (from scratch) USIM physical layer driver and transport protocol layers of T=0 and T=1 protocols for Smart Card communication. Used Comprion and Micropross SC sniffers/analyzers. Debugged ASIC and HW bugs and created workarounds in SW. Designed (specification) and implemented low-level API and created a suite of unitary and productions tests.
  8. - Enabled OpenOCD open-source project for ARM946E-S and MIPS24Kc platforms, contributing patches to the community under GPL licence by merging separatly maintained git repositories to the project mainline. Wrote complex shell and TCL scripts for usage of cheap FTDI-based USB JTAG dongles and replacing expensive third-partner solutions.
  9. - Reverse-engineered Lattice Mico32 MonitorROM and third-party VHDL code in order to develop support for OpenOCD usage of Layer 1 debugging by JTAG. Adapted UrJTAG for very low-level JTAG communication debugging.
  10. - Fully ported Linux for MIPS, OpenWRT distribution to SQN3110 FPGA chip, and re-wrote specifc configuration.
  11. - Fully wrote (from the scratch) scatter-gather zero-copy solution for inter-processor communication based on parallel communication between eCos and uClinux network drivers, using SW circular FIFOs and HW pointers. Developed Linux application to test the implementation by receiving RF packets sent from the eNodeB.
  12. - Implemented series of eCos RTOS drivers (watchdog, network activity GPIO, flash handling...) and low-level services. Modified bootloader code and NVRAM configuration in the binary form.
  13. - Compiled and prepared toolchains for ARMEB, MIPSEB and LM32 architectures.