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- library ieee;
- use ieee.std_logic_1164.all;
- entity temporizador is
- generic (fclk: integer := 1); -- frequencia do clock
- PORT (clk,clk2, rst, enable: in STD_LOGIC;--clk 2 tem que ser MUITO ALTO
- B2 : in std_LOGIC;
- buzina: out STD_LOGIC;
- D : out STD_LOGIC_VECTOR (0 to 6); -- saida decodificada
- saida : out std_logic_vector (1 downto 0)
- );
- end temporizador;
- ARCHITECTURE temporizador_arc OF temporizador IS
- SIGNAL dig1,dig2 : STD_LOGIC_VECTOR (0 to 6);
- BEGIN
- PROCESS(clk, rst, enable, B2)
- VARIABLE count0: INTEGER RANGE 0 TO fclk; --para 1Hz
- VARIABLE count1: INTEGER RANGE 0 TO 10; -- para o primeiro digito
- VARIABLE count2: INTEGER RANGE 0 TO 7; -- para o segundo digito
- BEGIN
- -- contadores
- if (rst = '1') then
- count0 := 0;
- count1 := 0;
- count2 := 0;
- elsif(clk'event and clk='1') then
- buzina<='0';
- if (enable='1') then
- count0 := count0 + 1;
- if (count0 = fclk) then
- count0 :=0;
- count1 := count1 +1;
- if (count1=10) then
- count1 := 0;
- count2 := count2 +1;
- end if;
- if(count2=2) then
- buzina <='1';
- elsif(count2=4) then
- buzina <='1';
- count2:=0;
- elsif(count2=6) then
- buzina <='1';
- count2:=0;
- end if;
- if(B2='1') then
- buzina<='1';
- end if;
- end if;
- end if;
- end if;
- -- display
- CASE count1 IS
- WHEN 0 => dig1 <= "1111110"; --126
- WHEN 1 => dig1 <= "0110000"; --48
- WHEN 2 => dig1 <= "1101101"; --109
- WHEN 3 => dig1 <= "1111001"; --121
- WHEN 4 => dig1 <= "0110011"; --51
- WHEN 5 => dig1 <= "1011011"; --91
- WHEN 6 => dig1 <= "1011111"; --95
- WHEN 7 => dig1 <= "1110000"; --112
- WHEN 8 => dig1 <= "1111111"; --127
- WHEN 9 => dig1 <= "1111011"; --123
- WHEN OTHERS => NULL;
- END CASE;
- CASE count2 IS
- WHEN 0 => dig2 <= "1111110"; --126
- WHEN 1 => dig2 <= "0110000"; --48
- WHEN 2 => dig2 <= "1101101"; --109
- WHEN 3 => dig2 <= "1111001"; --121
- WHEN 4 => dig2 <= "0110011"; --51
- WHEN 5 => dig2 <= "1011011"; --91
- WHEN 6 => dig2 <= "1011111"; --95
- WHEN OTHERS => NULL;
- END CASE;
- END PROCESS;
- process (clk2)
- begin
- if (clk2='0') then
- saida <= "01";
- D<= dig1;
- else
- saida <= "10";
- D<= dig2;
- end if;
- end process;
- END temporizador_arc;
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