module sev_state_moore_state_machine
(
    input logic clk, in, reset,
    output logic [2:0] out
);
    enum logic [2:0] {S0,S1,S2,S3, S4, S5, S6, S7} state, next_state;

    always_ff @ (posedge clk or negedge reset) begin
        if (!reset) state <= S0;
        else state <= next_state;
    end
    always_comb begin
        case (state)
                S0: next_state = in? S5:S0;
                S1: next_state = in? S6:S1;
                S2: next_state = in? S7:S2;
                S3: next_state = in? S0:S3;
                S4: next_state = in? S1:S4;
                S5: next_state = in? S2:S5;
                S6: next_state = in? S3:S6;
                S7: next_state = in? S4:S7;
                default: next_state = S0;
            endcase
    end
    always @ (state) begin
        case (state)
            S0: out = 3'b000;
            S1: out = 3'b001;
            S2: out = 3'b010;
            S3: out = 3'b011;
            S4: out = 3'b100;
            S5: out = 3'b101;
            S6: out = 3'b110;
            S7: out = 3'b111;
            default: out = 3'b000;
        endcase
    end
endmodule