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By: a guest on Feb 22nd, 2010  |  syntax: None  |  size: 2.15 KB  |  hits: 517  |  expires: Never
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  1. Analysis of http://en.pastebin.ca/1804195
  2.  
  3. Just a breakdown of which values were read/written to each register. I didn't count, but the info already was very valuable.
  4.  
  5. 0x00000000000000a0: read 0x00000000 write 0x00000000
  6. 0x00000000000000a4: read 0x00000000
  7. 0x0000000000000618: read 0xf6948517 write 0xf6948517
  8. 0x0000000000000710: MY_SPI_BIGLOCK  read 0x00000010 write 0x00000010 0x00000410 (bit 10 is set before the first SPI access and cleared after the last SPI access after all other register accesses are done)
  9. 0x0000000000000718: read 0x20010005 write 0x20010005
  10. 0x000000000000071c: read 0x021f0000 write 0x021f0000
  11. 0x0000000000000720: read 0x10280000 write 0x10280000
  12. 0x0000000000000724: read 0x00000000 write 0x00000000
  13. 0x0000000000001600: ROM_CNTL        read 0x11030300 write 0x11030300 0x11030302 (flip SCK_OVERWRITE)
  14. 0x0000000000001604: MY_SPI_REQUEST_BUS read 0x00000270 0x04000270 write 0x00000270 0x04000270 (set bit 24 before a transaction and check if it sticks. clear bit 24 after transaction and check if it sticks)
  15. 0x0000000000001618: MY_SPI_LENGTH   read 0x00040004 0x00070004 write 0x00040004 0x00070004 (bit 16-18 are command length-1, bit 0-3 are probably readcount, bit 19 is undocumented (always 1))
  16. 0x000000000000161c: MY_SPI_STATUS   read 0x00000000 0x00000001 write 0x00000000 (bit 0 is set if command execution is complete. that bit is cleared before reading the result of the read transaction)
  17. 0x0000000000001620: MY_SPI_COMMAND  write 0x00000090 0x0000009f 0x000000ab (REMS, RDID, RES)
  18. 0x0000000000001624: MY_SPI_RESPONSE read 0x007c9d7f 0x9d7f7c9d 0xffffffff (response to RDID, RES, REMS)
  19. 0x0000000000001798: MY_SPI_CHIP_IS_FREE read 0x00000000 0x00000700 write 0x00000000 0x00000700 (bit 8-10 are set after each transaction and after a read of the memmapped ROM, they are cleared before any access to the SPI chip)
  20. 0x000000000000179c: read 0x00000000 write 0x00000000 (always 0)
  21. 0x00000000000017a0: MY_SPI_CHIP_IS_FREE2 read 0x00000000 0x00000600 write 0x00000000 0x00000600 (bit 9-10 are set after each transaction and after a read of the memmapped ROM, they are cleared before any access to the SPI chip)
  22. 0x000000000000541c: read 0x00034036
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