List P=16f690 ; list directive to define processor
#include <p16f690.inc>
errorlevel -302
__config (_INTRC_OSC_NOCLKOUT & _WDT_OFF & _PWRTE_OFF & _MCLRE_OFF & _CP_OFF & _BOR_OFF & _IESO_OFF & _FCMEN_OFF)
;;; __config _FCMEN_OFF& _IESO_OFF& _MCLRE_OFF& _WDT_OFF& _INTOSCIO
;;; ;
;;; ; _FCMEN_OFF ; -- fail safe clock monitor enable off
;;; ; _IESO_OFF ; -- int/ext switch over enable off
;;; ; _BOR_ON ; default, brown out reset on
;;; ; _CPD_OFF ; default, data eeprom protection off
;;; ; _CP_OFF ; default, program code protection off
;;; ; _MCLR_OFF ; -- use MCLR pin as digital input
;;; ; _PWRTE_OFF ; default, power up timer off
;;; ; _WDT_OFF ; -- watch dog timer off
;;; ; _INTOSCIO ; -- internal osc, RA6 and RA7 I/O
;;; ;
;;; ; --< constants >---------------------------------------------------
radix dec
clock equ 8 ; 8 MHz
cblock 0x20
d1 ; Define four file registers for the
d2 ; delay loop
d3
d4
endc
org 0x000
goto Init
Init:
bsf STATUS,RP1 ; bank 2 |B2
clrf ANSEL ; turn off ADC pins |B2
clrf ANSELH ; turn off ADC pins |B2
;;;
;;; setup 8 MHz INTOSC
;;;
bcf STATUS,RP1 ; bank 0 |B0
bsf STATUS,RP0 ; bank 1 |B1
movlw b'01110000' ; '01110000' |B1
movwf OSCCON ; |B1
Stable:
btfss OSCCON,HTS ; osc stable? yes, skip, else |B1
goto Stable ; test again |B1
;;;
;;; setup ports
;;;
movlw 0xFF
movwf TRISA ; Make PortA all input
clrf TRISB ; setup PORT B all outputs |B1
clrf TRISC ; setup PORT C all outputs |B1
bcf STATUS,RP0
;; Make sure the "TX" port is OFF
bcf PORTB,4
start:
bsf PORTC,0
call ldelay
call set_on_nexa
call set_on_nexa
call set_on_nexa
call set_on_nexa
bcf PORTC,0
call ldelay
goto start
set_on_nexa:
;; Sync
call sync_nexa
;; transmitter id
call trans_id
;; Group 0
call one_nexa
call zero_nexa
;; Dimmer,On,Off : Dimmer 11
call zero_nexa
call zero_nexa
;; Channel
call one_nexa
call zero_nexa
call one_nexa
call zero_nexa
;; Button
call one_nexa
call zero_nexa
call one_nexa
call zero_nexa
;; Dim
call zero_nexa
call one_nexa
call zero_nexa
call one_nexa
call zero_nexa
call one_nexa
call zero_nexa
call one_nexa
;;
;; Delay 10ms
call zero_nexa
call Delay_2550
call Delay_2550
call Delay_2550
call Delay_2550
return
sync_nexa:
bsf PORTB,4
call Delay_240
bcf PORTB,4
call Delay_2550
return
one_nexa:
bsf PORTB,4
call Delay_240
bcf PORTB,4
call Delay_1270
return
zero_nexa:
bsf PORTB,4
call Delay_240
bcf PORTB,4
call Delay_240
return
ldelay:
movlw 5
movwf d4
movlw 250
call Delay
decfsz d4,f
goto $-2
Delay:
movwf d2
Delay_s: ; Original from another code, i dont change this, 350us * whatever W contains
;; 700 cycles
movlw 0xE9
movwf d1
Delay_0:
decfsz d1, f
goto $-1
decfsz d2, f
goto Delay_s
return
Delay_240:
;; 240us
movlw 0x9F
movwf d1
Delay_2:
decfsz d1, f
goto Delay_2
return
Delay_1270:
;; 1270us
movlw 0xFB
movwf d1
movlw 0x02
movwf d2
Delay_3:
decfsz d1, f
goto $+2
decfsz d2, f
goto Delay_3
return
Delay_2550:
;; 2550us this
movlw 0xE7
movwf d1
movlw 0x04
movwf d2
Delay_4:
decfsz d1, f
goto $+2
decfsz d2, f
goto Delay_4
return
;; 1010101010 01101010 010110 101001 1001100110 011001 010110
trans_id:
call one_nexa
call zero_nexa
call one_nexa
call zero_nexa
call one_nexa
call zero_nexa
call one_nexa
call zero_nexa
call one_nexa
call zero_nexa
call zero_nexa
call one_nexa
call one_nexa
call zero_nexa
call one_nexa
call zero_nexa
call one_nexa
call zero_nexa
call zero_nexa
call one_nexa
call zero_nexa
call one_nexa
call one_nexa
call zero_nexa
call one_nexa
call zero_nexa
call one_nexa
call zero_nexa
call zero_nexa
call one_nexa
call one_nexa
call zero_nexa
call zero_nexa
call one_nexa
call one_nexa
call zero_nexa
call zero_nexa
call one_nexa
call one_nexa
call zero_nexa
call zero_nexa
call one_nexa
call one_nexa
call zero_nexa
call zero_nexa
call one_nexa
call zero_nexa
call one_nexa
call zero_nexa
call one_nexa
call one_nexa
call zero_nexa
return
end