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  1. /*
  2. $Log: flash_dev.h,v $
  3. Revision 1.8  2008/01/18 08:53:26  Lingzhaojun
  4. no message
  5.  
  6. Revision 1.7  2007/12/12 02:39:04  Fangzhenfu
  7. Îļþϵͳ¸üУ¡ FLASH µ×²ã¸üУ¡
  8.  
  9. Revision 1.6  2007/11/27 14:01:34  Huangshilin
  10. ÐÞ¸Ä ÒôƵˢÆÁÔëÒô,ϵͳ·´Ó¦ÂýµÄ BUG.
  11.  
  12. Revision 1.5  2007/11/21 13:13:46  Fangzhenfu
  13. ɾ³ý¾ÉµÄÉý¼¶¹¤¾ß£¡Í³Ò»²ÉÓÃÐµĹ¤¾ß¸úÎļþϵͳ¡¢USB
  14.  
  15. Revision 1.4  2007/11/07 07:25:50  Fangzhenfu
  16. USB ÌáËÙ£¨Ð¡ÎļþÌáËÙ£¬Ä¿Ç°ËÙ¶Èд 3M ×óÓÒ£¬¶Á 6.5M×óÓÒ£¬ 4K PAGE FLASH ¿Éµ½ 5M£¬8M£©£¬
  17. ÎļþϵͳÐ޸ģ¡
  18. ¼ÓÈë FLASH ·ÃÎÊʱÐò API £¡ ¼û flash_dev.h ÖÐ
  19. FlashTimingCfg£¨uint32 Freq£© Freq Ϊ×ÜÏßƵÂÊ---´ò°ü
  20. µÚÒ»´Îµ÷Óà FlashTimingCfg£¨£©Ê±ÇëÔÚ FS_Init() Ö®ºóµ÷Óã¬ÆäËüÔÚ×ÜÏßƵÂʱ仯ʱµ÷Óã¡
  21.  
  22. Revision 1.3  2007/10/08 02:58:36  Lingzhaojun
  23. Ìí¼Ó°æ±¾×Ô¶¯×¢Êͽű¾
  24.  
  25. */
  26. #ifndef _FS_FLASH_DEV_H_
  27. #define _FS_FLASH_DEV_H_
  28.  
  29. #include "stdio.h"
  30. #include "string.h"
  31.  
  32. #undef EXT
  33. #ifdef _IN_FS_FLASH_DEV_
  34. #define EXT
  35. #else
  36. #define EXT extern
  37. #endif
  38.  
  39. /*
  40. *******************************************************************************
  41. Flash Ïà¹ØµÄÅäÖÃÐÅÏ¢
  42. ×¢£ºÊ¹Óà Lib Îļþʱ£¬ÏÂÃæµÄºê¶¨Òå²¢²»Æð×÷Óã¬Ö»Ìṩһ¸ö²Î¿¼µ±Ç°ËùÓõĿâµÄÅäÖÃ
  43. *******************************************************************************
  44. */
  45.  
  46. #define  DISK_SYS            0  //CÅÌ
  47. #define  DISK_FLASH_1         1  
  48. #define  DISK_FLASH_2         2  
  49. #define  DISK_FLASH_3         3  
  50. #define  DISK_FLASH_4         4  
  51. #define  DISK_FLASH_5         5  
  52. #define  DISK_FLASH_6         6  
  53. #define  DISK_FLASH_7         7  
  54. #define  DISK_FLASH_8         8  
  55. #define  DISK_FLASH_9         9  
  56. #define  DISK_FLASH_10        10  
  57. #define  DISK_FLASH_11        11  
  58. #define  DISK_FLASH_12        12  
  59. #define  DISK_FLASH_13        13  
  60. #define  DISK_FLASH_14        14  
  61. #define  DISK_FLASH_15        15  
  62. #define  DISK_FLASH_16        16  
  63. //1¿ÉÅäÖòÎÊý
  64. //#define  BOOT_ONLY               //¶¨ÒåÖ»Éú³ÉÖмä¼þÒýµ¼´úÂë, ²»¶¨ÒåÔòÊÇÍêÕûµÄÎļþϵͳ
  65. #ifndef     BOOT_ONLY
  66. //#define  DEBUG_FLASH    //¶¨ÒåFLASHµ÷ÊÔģʽʹÄÜ
  67. //#define  IN_SYSTEM   //ǶÈ뵽ϵͳÈí¼þʱ¶¨Òå
  68. //#define  OS_FILE    //¶¨ÒåOSϵÄÎļþϵͳ
  69. #endif
  70.  
  71. #ifndef SETUP
  72. #define  USB         //¶¨ÒåʹÄÜUSB
  73. #endif
  74. #define  DUAL_PLANE    //¶¨ÒåNAND FLASH DUAL PLANE²ÁдʹÄÜ
  75. #define  SYS_PROTECT   //¶¨Òåϵͳ±£ÁôÇøдʹÄÜ
  76. //#define     VIRTUAL_MEMORY  0x400000  //¶¨ÒåÐéÄâÄÚ´æ2GB
  77. #define     SYS_DISK_HID    0       //ϵͳÅÌʹÄÜ, 1=Òþ²Ø, 0=ÏÔʾ
  78.  
  79.  
  80.  
  81. #if(RK27XX_IO_MEMMAP == LDK_MMU_DISABLE)
  82. #define  RegNandCtrlBase   0x1E740000   //from mail.h
  83. #define  INTC0_VIR_ARRD          0x19C40000
  84. #define     UDC_BASE    0x19CC0000
  85. #define     ARM7_CACHE_CON_BASE  0xEFFF0000
  86. #define     HDMA_BASE               0x1E700000
  87. #define  SRAM_BASE_ADDR      0x18200000  //SRAMµÄ×îºó512B
  88. #define  SDRAM_BASE_ADDR      0x17000000
  89. #elif(RK27XX_IO_MEMMAP == LDK_MMU_ENABLE)
  90. #define  RegNandCtrlBase   0x02440000   //from mail.h
  91. #define  INTC0_VIR_ARRD          0x02040000
  92. #define     UDC_BASE    0x020C0000
  93. #define     ARM7_CACHE_CON_BASE  0xEFFF0000
  94. #define     HDMA_BASE               0x02400000
  95. #define  SRAM_BASE_ADDR      0x18200000  //SRAMµÄ×îºó512B
  96. #define  SDRAM_BASE_ADDR      0x01000000
  97. #elif(RK27XX_IO_MEMMAP == PORSCHE9_IO_MEMMAP)
  98. #define  RegNandCtrlBase   0x180E8000   //from mail.h
  99. #define  INTC0_VIR_ARRD          0x18080000
  100. #define     UDC_BASE    0x180A0000
  101. #define     ARM7_CACHE_CON_BASE  0xEFFF0000
  102. #define     HDMA_BASE               0x18090000
  103. #define  SRAM_BASE_ADDR      0x18200000  //SRAMµÄ×îºó512B
  104. #define  SDRAM_BASE_ADDR      0x60000000
  105. #else
  106. #undef      RegNandCtrlBase
  107. #undef      INTC0_VIR_ARRD
  108. #undef     UDC_BASE
  109. #undef      ARM7_CACHE_CON_BASE
  110. #undef      HDMA_BASE
  111. #undef      SRAM_BASE_ADDR
  112. #undef      SDRAM_BASE_ADDR
  113. #endif
  114.  
  115. #define  FLASH0_DATA       (RegNandCtrlBase+0x0200)
  116. #define  FLASH0_ADDR       (RegNandCtrlBase+0x0204)
  117. #define  FLASH0_CMD       (RegNandCtrlBase+0x0208)
  118. #define  FLASH0_0    (RegNandCtrlBase+0x0a00)
  119. #define  SPARE0_0    (RegNandCtrlBase+0x1200)
  120.  
  121. #endif
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