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By: a guest on Nov 29th, 2012  |  syntax: Diff  |  size: 6.34 KB  |  views: 33  |  expires: Never
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  1. diff --git a/firmware/target/arm/rk27xx/debug-rk27xx.c b/firmware/target/arm/rk27xx/debug-rk27xx.c
  2. index 5c2d356..7786e50 100644
  3. --- a/firmware/target/arm/rk27xx/debug-rk27xx.c
  4. +++ b/firmware/target/arm/rk27xx/debug-rk27xx.c
  5. @@ -43,6 +43,9 @@
  6.  extern unsigned long sd_debug_time_rd;
  7.  extern unsigned long sd_debug_time_wr;
  8.  
  9. +extern volatile uint32_t udc_irq[8];
  10. +extern volatile uint32_t udc_setup;
  11. +
  12.  bool dbg_hw_info(void)
  13.  {
  14.      int line;
  15. @@ -62,6 +65,11 @@ bool dbg_hw_info(void)
  16.          _DEBUG_PRINTF("SCU_DIVCON1: 0x%0x", SCU_DIVCON1);
  17.          _DEBUG_PRINTF("SCU_CLKCFG:  0x%0x", SCU_CLKCFG);
  18.          _DEBUG_PRINTF("SCU_CHIPCFG: 0x%0x", SCU_CHIPCFG);
  19. +        _DEBUG_PRINTF("INTC_IMR: 0x%0x", INTC_IMR);
  20. +        _DEBUG_PRINTF("INTC_IECR: 0x%0x", INTC_IECR);
  21. +        _DEBUG_PRINTF("udc_irq[] 1:0x%0x 2:0x%0x 3:0x%0x 4:0x%0x 5:0x%0x 6:0x%0x 7:0x%0x", udc_irq[0],udc_irq[1],udc_irq[2],udc_irq[3],udc_irq[4],udc_irq[5],udc_irq[6],udc_irq[7]);
  22. +        _DEBUG_PRINTF("udc_setup: %d", udc_setup);
  23. +
  24.          line++;
  25.          _DEBUG_PRINTF("sd_debug_time_rd: %d", sd_debug_time_rd);
  26.          _DEBUG_PRINTF("sd_debug_time_wr: %d", sd_debug_time_wr);
  27. diff --git a/firmware/target/arm/rk27xx/usb-drv-rk27xx.c b/firmware/target/arm/rk27xx/usb-drv-rk27xx.c
  28. index 3001509..b137293 100644
  29. --- a/firmware/target/arm/rk27xx/usb-drv-rk27xx.c
  30. +++ b/firmware/target/arm/rk27xx/usb-drv-rk27xx.c
  31. @@ -98,6 +98,10 @@ static struct endpoint_t endpoints[16] = {
  32.      {USB_ENDPOINT_XFER_INT,  DIR_IN,  false, NULL, 0, 0, false, {0, 0, 0}},  /* IIN15  */
  33.  };
  34.  
  35. +volatile uint32_t udc_irq[8] = {0,0,0,0,0,0,0,0};
  36. +volatile uint32_t udc_irq_idx = 0;
  37. +volatile uint32_t udc_setup = 0;
  38. +
  39.  static void setup_received(void)
  40.  {
  41.      static uint32_t setup_data[2];
  42. @@ -229,17 +233,35 @@ static void int_write(int ep)
  43.      endpoints[ep_num].buf += xfer_size;
  44.  }
  45.  
  46. +static void udc_phy_reset(void)
  47. +{
  48. +    DEV_CTL |= (1<<7); // SOFT POR
  49. +    udelay(10000);
  50. +    DEV_CTL &= ~(1<<7);
  51. +}
  52. +
  53. +static void udc_soft_connect(void)
  54. +{
  55. +    DEV_CTL |= (1<<8) | /* Configure CSR done */
  56. +               (1<<4) | /* Device soft connect */
  57. +               (1<<3);  /* Device self power */
  58. +}
  59. +
  60.  /* UDC ISR function */
  61.  void INT_UDC(void)
  62.  {
  63.      uint32_t txstat, rxstat;
  64.      int tmp, ep_num;
  65. -    
  66. +
  67.      /* read what caused UDC irq */
  68.      uint32_t intsrc = INT2FLAG & 0x7fffff;
  69. -    
  70. +  
  71. +    udc_irq[udc_irq_idx & 7] = intsrc;
  72. +    udc_irq_idx++;
  73. +
  74.      if (intsrc & (1<<1)) /* setup interrupt */
  75.      {
  76. +        udc_setup++;
  77.          setup_received();
  78.      }
  79.      else if (intsrc & (1<<2)) /* ep0 in interrupt */
  80. @@ -286,7 +308,25 @@ void INT_UDC(void)
  81.      }
  82.      else if (intsrc & (1<<4)) /* usb reset */
  83.      {
  84. -        usb_drv_init();
  85. +    EN_INT = (1<<6) |  /* Enable Suspend Interrupt */
  86. +             (1<<5) |  /* Enable Resume Interrupt */
  87. +             (1<<4) |  /* Enable USB Reset Interrupt */
  88. +             (1<<3) |  /* Enable OUT Token receive Interrupt EP0 */
  89. +             (1<<2) |  /* Enable IN Token transmits Interrupt EP0 */
  90. +             (1<<1);   /* Enable SETUP Packet Receive Interrupt */
  91. +
  92. +    INTCON = (1<<2) |  /* interrupt high active */
  93. +             (1<<0);   /* enable EP0 interrupts */
  94. +
  95. +    TX0CON = (1<<6) |  /* Set as one to enable the EP0 tx irq */
  96. +             (1<<2);   /* Set as one to response NAK handshake */
  97. +
  98. +    RX0CON = (1<<7) |
  99. +             (1<<4) |  /* Endpoint 0 Enable. When cleared the endpoint does
  100. +                        * not respond to an SETUP or OUT token
  101. +                        */
  102. +
  103. +             (1<<3);   /* Set as one to response NAK handshake */
  104.      }
  105.      else if (intsrc & (1<<5)) /* usb resume */
  106.      {
  107. @@ -300,6 +340,9 @@ void INT_UDC(void)
  108.      }
  109.      else if (intsrc & (1<<7)) /* usb connect */
  110.      {
  111. +        udc_phy_reset();
  112. +        udelay(10000);
  113. +        udc_soft_connect();
  114.      }
  115.      else
  116.      {
  117. @@ -641,9 +684,6 @@ void usb_drv_init(void)
  118.  {
  119.      int ep_num;
  120.          
  121. -    /* enable USB clock */
  122. -    SCU_CLKCFG &= ~(1<<6);
  123. -    
  124.      /* 1. do soft disconnect */
  125.      DEV_CTL = (1<<3); /* DEV_SELF_PWR */
  126.  
  127. @@ -657,14 +697,14 @@ void usb_drv_init(void)
  128.      /* 4. clear SOFT_POR bit */
  129.      DEV_CTL  &= ~(1<<7);
  130.      
  131. -    /* 5. configure minimal EN_INT */
  132. +     /* 5. configure minimal EN_INT */
  133.      EN_INT = (1<<6) |  /* Enable Suspend Interrupt */
  134.               (1<<5) |  /* Enable Resume Interrupt */
  135.               (1<<4) |  /* Enable USB Reset Interrupt */
  136.               (1<<3) |  /* Enable OUT Token receive Interrupt EP0 */
  137.               (1<<2) |  /* Enable IN Token transmits Interrupt EP0 */
  138.               (1<<1);   /* Enable SETUP Packet Receive Interrupt */
  139. -            
  140. +            
  141.      /* 6. configure INTCON */
  142.      INTCON = (1<<2) |  /* interrupt high active */
  143.               (1<<0);   /* enable EP0 interrupts */
  144. @@ -681,8 +721,8 @@ void usb_drv_init(void)
  145.               (1<<3);   /* Set as one to response NAK handshake */
  146.              
  147.      /* 8. write final bits to DEV_CTL */
  148. -    DEV_CTL = (1<<8) | /* Configure CSR done */
  149. -              (1<<6) | /* 16-bit data path enabled. udc_clk = 30MHz */
  150. +    DEV_CTL |= (1<<8) | /* Configure CSR done */
  151. +    //          (1<<6) | /* 16-bit data path enabled. udc_clk = 30MHz */
  152.                (1<<4) | /* Device soft connect */
  153.                (1<<3);  /* Device self power */
  154.  
  155. @@ -707,16 +747,18 @@ void usb_drv_init(void)
  156.              BIN_TXCON(ep_num) |= (ep_num<<8)|(1<<3)|(1<<2); /* ep_num, enable, NAK */
  157.          }
  158.      }
  159. +
  160. +
  161.  }
  162.  
  163.  /* turn off usb core */
  164.  void usb_drv_exit(void)
  165.  {
  166. -    DEV_CTL = (1<<3); /* DEV_SELF_PWR */
  167. +//    DEV_CTL = (1<<3); /* DEV_SELF_PWR */
  168.      
  169.      /* disable USB interrupts in interrupt controller */
  170. -    INTC_IMR &= ~(1<<16);
  171. -    INTC_IECR &= ~(1<<16);
  172. +//    INTC_IMR &= ~(1<<16);
  173. +//    INTC_IECR &= ~(1<<16);
  174.      
  175.      /* we cannot disable UDC clock since this causes data abort
  176.       * when reading DEV_INFO in order to check usb connect event
  177. diff --git a/firmware/target/arm/rk27xx/usb-rk27xx.c b/firmware/target/arm/rk27xx/usb-rk27xx.c
  178. index 20bf867..8e32d80 100644
  179. --- a/firmware/target/arm/rk27xx/usb-rk27xx.c
  180. +++ b/firmware/target/arm/rk27xx/usb-rk27xx.c
  181. @@ -32,6 +32,8 @@ int usb_status = USB_EXTRACTED;
  182.  
  183.  void usb_init_device(void)
  184.  {
  185. +    INTC_IMR |= (1<<16);
  186. +    INTC_IECR |= (1<<16);
  187.  }
  188.  
  189.  void usb_attach(void)