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  1. Serial console started. To stop, type #.
  2. @(#)Hostconfig 1.6.4 2016/02/20 14:36
  3. 2016-09-20 11:14:08 0:00:0> NOTICE: TPM is turned off
  4. 2016-09-20 11:14:11 0:00:0> NOTICE: Using HW change diag level and verbosity
  5. 2016-09-20 11:14:20 7:00:0> NOTICE: SPARC-T5 Revision 1.2 Speed 3600MHz
  6. 2016-09-20 11:14:20 0:00:0> NOTICE: SPARC-T5 Revision 1.2 Speed 3600MHz
  7. 2016-09-20 11:14:21 1:00:0> NOTICE: SPARC-T5 Revision 1.2 Speed 3600MHz
  8. 2016-09-20 11:14:21 6:00:0> NOTICE: SPARC-T5 Revision 1.2 Speed 3600MHz
  9. 2016-09-20 11:14:38 0:00:0> NOTICE: Initializing Memory
  10. 2016-09-20 11:15:28 0:00:0> NOTICE: Starting Early POST
  11. 2016-09-20 11:15:43.344 0:0:0>POST 5.3.4 2016/02/20 14:20
  12.  
  13. Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved.
  14. 2016-09-20 11:15:43.503 0:0:0>SPARC-T5 Revision 1.2
  15. 2016-09-20 11:15:43.502 1:0:0>SPARC-T5 Revision 1.2
  16. 2016-09-20 11:15:43.502 6:0:0>SPARC-T5 Revision 1.2
  17. 2016-09-20 11:15:43.502 7:0:0>SPARC-T5 Revision 1.2
  18. 2016-09-20 11:15:43.610 0:0:0>Serial Number = 0.0.0.ba0a08412f088
  19. 2016-09-20 11:15:43.666 1:0:0>Serial Number = 0.0.0.ba0f8431022c6
  20. 2016-09-20 11:15:43.719 6:0:0>Serial Number = 0.0.0.ba051208a820a
  21. 2016-09-20 11:15:43.772 7:0:0>Serial Number = 0.0.0.b9eb8438aa24a
  22. 2016-09-20 11:15:44.827 0:0:0>Initial Globals: **** DiagLevel=Max, Phase=Early, Mode=Normal, Verbosity=Normal ****
  23. 2016-09-20 11:15:44.889 1:0:0>Initial Globals: **** DiagLevel=Max, Phase=Early, Mode=Normal, Verbosity=Normal ****
  24. 2016-09-20 11:15:44.958 6:0:0>Initial Globals: **** DiagLevel=Max, Phase=Early, Mode=Normal, Verbosity=Normal ****
  25. 2016-09-20 11:15:45.021 7:0:0>Initial Globals: **** DiagLevel=Max, Phase=Early, Mode=Normal, Verbosity=Normal ****
  26. 2016-09-20 11:15:44.994 0:0:0>POST Running.
  27. 2016-09-20 11:15:45.100 1:0:0>POST Running.
  28. 2016-09-20 11:15:45.205 6:0:0>POST Running.
  29. 2016-09-20 11:15:45.313 7:0:0>POST Running.
  30. 2016-09-20 11:15:45.341 0:0:0>Default RYOP
  31. 2016-09-20 11:15:45.386 1:0:0>Default RYOP
  32. 2016-09-20 11:15:45.432 6:0:0>Default RYOP
  33. 2016-09-20 11:15:45.478 7:0:0>Default RYOP
  34. 2016-09-20 11:15:47.986 0:0:0>Verify CPU MBIST Results
  35. 2016-09-20 11:15:48.035 1:0:0>Verify CPU MBIST Results
  36. 2016-09-20 11:15:48.084 6:0:0>Verify CPU MBIST Results
  37. 2016-09-20 11:15:48.134 7:0:0>Verify CPU MBIST Results
  38. 2016-09-20 11:15:50.029 0:0:0>Run from Cache
  39. 2016-09-20 11:15:50.083 1:0:0>Run from Cache
  40. 2016-09-20 11:15:50.142 6:0:0>Run from Cache
  41. 2016-09-20 11:15:50.201 7:0:0>Run from Cache
  42. 2016-09-20 11:17:14.238 0:0:0>setup multithread env in cache
  43. 2016-09-20 11:17:14.271 1:0:0>setup multithread env in cache
  44. 2016-09-20 11:17:14.299 6:0:0>setup multithread env in cache
  45. 2016-09-20 11:17:14.320 7:0:0>setup multithread env in cache
  46. 2016-09-20 11:17:15.062 0:0:0>L2Cache RAM tests from PROM
  47. 2016-09-20 11:17:15.096 1:0:0>L2Cache RAM tests from PROM
  48. 2016-09-20 11:17:15.121 6:0:0>L2Cache RAM tests from PROM
  49. 2016-09-20 11:17:15.142 7:0:0>L2Cache RAM tests from PROM
  50. 2016-09-20 11:17:30.588 0:0:0>Setup CPU MBISI
  51. 2016-09-20 11:17:30.613 0:0:0>Sync Chips
  52. 2016-09-20 11:17:30.673 1:0:0>Setup CPU MBISI
  53. 2016-09-20 11:17:30.693 1:0:0>Sync Chips
  54. 2016-09-20 11:17:30.707 6:0:0>Setup CPU MBISI
  55. 2016-09-20 11:17:30.716 7:0:0>Setup CPU MBISI
  56. 2016-09-20 11:17:30.721 6:0:0>Sync Chips
  57. 2016-09-20 11:17:30.731 7:0:0>Sync Chips
  58. 2016-09-20 11:17:31.628 0:0:0>POST Phase Complete
  59. 2016-09-20 11:17:31.637 0:0:0>POST Exit reason = 0
  60. 2016-09-20 11:18:31 0:00:0> NOTICE: Initializing MCU 0 Memory Link 0
  61. 2016-09-20 11:18:46 0:00:0> NOTICE: Initializing MCU 0 Memory Link 1
  62. 2016-09-20 11:19:02 0:00:0> NOTICE: Initializing MCU 1 Memory Link 0
  63. 2016-09-20 11:19:19 0:00:0> NOTICE: Initializing MCU 1 Memory Link 1
  64. 2016-09-20 11:19:35 0:00:0> NOTICE: Initializing MCU 2 Memory Link 0
  65. 2016-09-20 11:19:52 0:00:0> NOTICE: Initializing MCU 2 Memory Link 1
  66. 2016-09-20 11:20:07 0:00:0> NOTICE: Initializing MCU 3 Memory Link 0
  67. 2016-09-20 11:20:23 0:00:0> NOTICE: Initializing MCU 3 Memory Link 1
  68. 2016-09-20 11:20:47 0:00:0> NOTICE: Pausing for 120 seconds for Coherence Link tuning
  69. 2016-09-20 11:22:47 0:00:0> NOTICE: Found optimal settings
  70. 2016-09-20 11:23:45 0:00:0> NOTICE: Starting Board POST
  71. 2016-09-20 11:24:01.117 1:0:0>Initial Globals: **** DiagLevel=Max, Phase=Board, Mode=Normal, Verbosity=Normal ****
  72. 2016-09-20 11:24:01.117 6:0:0>Initial Globals: **** DiagLevel=Max, Phase=Board, Mode=Normal, Verbosity=Normal ****
  73. 2016-09-20 11:24:01.117 7:0:0>Initial Globals: **** DiagLevel=Max, Phase=Board, Mode=Normal, Verbosity=Normal ****
  74. 2016-09-20 11:24:01.122 0:0:0>Initial Globals: **** DiagLevel=Max, Phase=Board, Mode=Normal, Verbosity=Normal ****
  75. 2016-09-20 11:24:01.275 1:0:0>POST Running.
  76. 2016-09-20 11:24:01.378 6:0:0>POST Running.
  77. 2016-09-20 11:24:01.483 7:0:0>POST Running.
  78. 2016-09-20 11:24:01.586 0:0:0>POST Running.
  79. 2016-09-20 11:24:01.612 1:0:0>Default RYOP
  80. 2016-09-20 11:24:01.659 6:0:0>Default RYOP
  81. 2016-09-20 11:24:01.705 7:0:0>Default RYOP
  82. 2016-09-20 11:24:01.755 0:0:0>Default RYOP
  83. 2016-09-20 11:24:10.761 1:0:0>BOB SMBus Access Sanity Test
  84. 2016-09-20 11:24:10.814 6:0:0>BOB SMBus Access Sanity Test
  85. 2016-09-20 11:24:10.867 7:0:0>BOB SMBus Access Sanity Test
  86. 2016-09-20 11:24:10.918 0:0:0>BOB SMBus Access Sanity Test
  87. 2016-09-20 11:24:14.870 0:0:0>Enable BOB Errors
  88. 2016-09-20 11:24:15.313 1:0:0>Enable BOB Errors
  89. 2016-09-20 11:24:17.388 0:0:0>Probe Memory
  90. 2016-09-20 11:24:17.520 6:0:0>Enable BOB Errors
  91. 2016-09-20 11:24:18.255 1:0:0>Probe Memory
  92. 2016-09-20 11:24:18.415 7:0:0>Enable BOB Errors
  93. 2016-09-20 11:24:18.479 0:0:0>Total Node Memory Size: 256GB
  94. 2016-09-20 11:24:18.830 0:0:0>Idle and Sync CMP Masters
  95. 2016-09-20 11:24:19.835 1:0:0>Total Node Memory Size: 256GB
  96. 2016-09-20 11:24:20.184 1:0:0>Idle and Sync CMP Masters
  97. 2016-09-20 11:24:21.368 6:0:0>Probe Memory
  98. 2016-09-20 11:24:22.624 7:0:0>Probe Memory
  99. 2016-09-20 11:24:24.033 6:0:0>Total Node Memory Size: 256GB
  100. 2016-09-20 11:24:24.377 6:0:0>Idle and Sync CMP Masters
  101. 2016-09-20 11:24:25.392 0:0:0>0 Waiting for CPUs=0000000000000080, timeout in 3 seconds.
  102. 2016-09-20 11:24:25.567 7:0:0>Total Node Memory Size: 256GB
  103. 2016-09-20 11:24:25.863 7:0:0>Idle and Sync CMP Masters
  104. 2016-09-20 11:24:26.164 0:0:0>Initial memory scrub
  105. 2016-09-20 11:24:27.781 0:0:0>POST Critical region memory check
  106. 2016-09-20 11:24:31.408 0:0:0>Copy POST to DRAM
  107. 2016-09-20 11:24:43.038 0:0:0>Jump to DRAM
  108. 2016-09-20 11:24:45.494 0:0:0>Setup Multi Thread Environment
  109. 2016-09-20 11:24:46.063 0:0:0>Wake CMP Masters
  110. 2016-09-20 11:24:46.279 0:0:0>Set CMP Masters Present
  111. 2016-09-20 11:24:46.351 0:0:0>Fill Memory Chunks
  112. 2016-09-20 11:24:46.564 0:0:0>Adjust Memory Chunks
  113. 2016-09-20 11:24:47.222 0:0:0>Initialize Memory for TSB
  114. 2016-09-20 11:24:47.414 0:0:0>Virtual Memory Setup
  115. 2016-09-20 11:24:47.424 0:0:0>CMP 0 start-ra = 000000000384a380 end-ra 0000004000000000
  116. 2016-09-20 11:24:47.440 0:0:0>Total sys Mem = 0000004000000000
  117. 2016-09-20 11:24:47.519 1:0:0>CMP 1 start-ra = 0000004000000000 end-ra 0000008000000000
  118. 2016-09-20 11:24:47.535 1:0:0>Total sys Mem = 0000008000000000
  119. 2016-09-20 11:24:47.719 6:0:0>CMP 6 start-ra = 0000008000000000 end-ra 000000c000000000
  120. 2016-09-20 11:24:47.735 6:0:0>Total sys Mem = 000000c000000000
  121. 2016-09-20 11:24:47.920 7:0:0>CMP 7 start-ra = 000000c000000000 end-ra 0000010000000000
  122. 2016-09-20 11:24:47.935 7:0:0>Total sys Mem = 0000010000000000
  123. 2016-09-20 11:24:48.059 0:0:0>Setup CPU Present
  124. 2016-09-20 11:24:48.280 0:0:0>Wake CMP Threads
  125. 2016-09-20 11:24:50.229 0:0:0>Set CMP Threads Present
  126. 2016-09-20 11:24:50.301 0:0:0>Dump Dimm Size
  127. 2016-09-20 11:24:50.310 0:0:0>CMP 0
  128. /SYS/PM0/CM0/CMP/BOB0/CH0/D0 0000000400000000
  129. /SYS/PM0/CM0/CMP/BOB0/CH1/D0 0000000400000000
  130. /SYS/PM0/CM0/CMP/BOB1/CH0/D0 0000000400000000
  131. /SYS/PM0/CM0/CMP/BOB1/CH1/D0 0000000400000000
  132. /SYS/PM0/CM0/CMP/BOB2/CH0/D0 0000000400000000
  133. /SYS/PM0/CM0/CMP/BOB2/CH1/D0 0000000400000000
  134. /SYS/PM0/CM0/CMP/BOB3/CH0/D0 0000000400000000
  135. /SYS/PM0/CM0/CMP/BOB3/CH1/D0 0000000400000000
  136. /SYS/PM0/CM0/CMP/BOB4/CH0/D0 0000000400000000
  137. /SYS/PM0/CM0/CMP/BOB4/CH1/D0 0000000400000000
  138. /SYS/PM0/CM0/CMP/BOB5/CH0/D0 0000000400000000
  139. /SYS/PM0/CM0/CMP/BOB5/CH1/D0 0000000400000000
  140. /SYS/PM0/CM0/CMP/BOB6/CH0/D0 0000000400000000
  141. /SYS/PM0/CM0/CMP/BOB6/CH1/D0 0000000400000000
  142. /SYS/PM0/CM0/CMP/BOB7/CH0/D0 0000000400000000
  143. /SYS/PM0/CM0/CMP/BOB7/CH1/D0 0000000400000000
  144. 2016-09-20 11:24:50.528 1:0:0>CMP 1
  145. /SYS/PM0/CM1/CMP/BOB0/CH0/D0 0000000400000000
  146. /SYS/PM0/CM1/CMP/BOB0/CH1/D0 0000000400000000
  147. /SYS/PM0/CM1/CMP/BOB1/CH0/D0 0000000400000000
  148. /SYS/PM0/CM1/CMP/BOB1/CH1/D0 0000000400000000
  149. /SYS/PM0/CM1/CMP/BOB2/CH0/D0 0000000400000000
  150. /SYS/PM0/CM1/CMP/BOB2/CH1/D0 0000000400000000
  151. /SYS/PM0/CM1/CMP/BOB3/CH0/D0 0000000400000000
  152. /SYS/PM0/CM1/CMP/BOB3/CH1/D0 0000000400000000
  153. /SYS/PM0/CM1/CMP/BOB4/CH0/D0 0000000400000000
  154. /SYS/PM0/CM1/CMP/BOB4/CH1/D0 0000000400000000
  155. /SYS/PM0/CM1/CMP/BOB5/CH0/D0 0000000400000000
  156. /SYS/PM0/CM1/CMP/BOB5/CH1/D0 0000000400000000
  157. /SYS/PM0/CM1/CMP/BOB6/CH0/D0 0000000400000000
  158. /SYS/PM0/CM1/CMP/BOB6/CH1/D0 0000000400000000
  159. /SYS/PM0/CM1/CMP/BOB7/CH0/D0 0000000400000000
  160. /SYS/PM0/CM1/CMP/BOB7/CH1/D0 0000000400000000
  161. 2016-09-20 11:24:50.887 6:0:0>CMP 6
  162. /SYS/PM3/CM0/CMP/BOB0/CH0/D0 0000000400000000
  163. /SYS/PM3/CM0/CMP/BOB0/CH1/D0 0000000400000000
  164. /SYS/PM3/CM0/CMP/BOB1/CH0/D0 0000000400000000
  165. /SYS/PM3/CM0/CMP/BOB1/CH1/D0 0000000400000000
  166. /SYS/PM3/CM0/CMP/BOB2/CH0/D0 0000000400000000
  167. /SYS/PM3/CM0/CMP/BOB2/CH1/D0 0000000400000000
  168. /SYS/PM3/CM0/CMP/BOB3/CH0/D0 0000000400000000
  169. /SYS/PM3/CM0/CMP/BOB3/CH1/D0 0000000400000000
  170. /SYS/PM3/CM0/CMP/BOB4/CH0/D0 0000000400000000
  171. /SYS/PM3/CM0/CMP/BOB4/CH1/D0 0000000400000000
  172. /SYS/PM3/CM0/CMP/BOB5/CH0/D0 0000000400000000
  173. /SYS/PM3/CM0/CMP/BOB5/CH1/D0 0000000400000000
  174. /SYS/PM3/CM0/CMP/BOB6/CH0/D0 0000000400000000
  175. /SYS/PM3/CM0/CMP/BOB6/CH1/D0 0000000400000000
  176. /SYS/PM3/CM0/CMP/BOB7/CH0/D0 0000000400000000
  177. /SYS/PM3/CM0/CMP/BOB7/CH1/D0 0000000400000000
  178. 2016-09-20 11:24:51.132 7:0:0>CMP 7
  179. /SYS/PM3/CM1/CMP/BOB0/CH0/D0 0000000400000000
  180. /SYS/PM3/CM1/CMP/BOB0/CH1/D0 0000000400000000
  181. /SYS/PM3/CM1/CMP/BOB1/CH0/D0 0000000400000000
  182. /SYS/PM3/CM1/CMP/BOB1/CH1/D0 0000000400000000
  183. /SYS/PM3/CM1/CMP/BOB2/CH0/D0 0000000400000000
  184. /SYS/PM3/CM1/CMP/BOB2/CH1/D0 0000000400000000
  185. /SYS/PM3/CM1/CMP/BOB3/CH0/D0 0000000400000000
  186. /SYS/PM3/CM1/CMP/BOB3/CH1/D0 0000000400000000
  187. /SYS/PM3/CM1/CMP/BOB4/CH0/D0 0000000400000000
  188. /SYS/PM3/CM1/CMP/BOB4/CH1/D0 0000000400000000
  189. /SYS/PM3/CM1/CMP/BOB5/CH0/D0 0000000400000000
  190. /SYS/PM3/CM1/CMP/BOB5/CH1/D0 0000000400000000
  191. /SYS/PM3/CM1/CMP/BOB6/CH0/D0 0000000400000000
  192. /SYS/PM3/CM1/CMP/BOB6/CH1/D0 0000000400000000
  193. /SYS/PM3/CM1/CMP/BOB7/CH0/D0 0000000400000000
  194. /SYS/PM3/CM1/CMP/BOB7/CH1/D0 0000000400000000
  195. 2016-09-20 11:24:51.457 0:0:0>Memory Clear
  196. 2016-09-20 11:25:22.002 0:0:0>Flush L3 cache
  197. 2016-09-20 11:25:22.301 0:0:0>Enable All COU Errors
  198. 2016-09-20 11:25:22.917 0:0:0>Enable All CLU Errors
  199. 2016-09-20 11:25:23.131 0:0:0>Enable CPU Errors
  200. 2016-09-20 11:25:23.512 0:0:0>Enable L3 Cache Errors
  201. 2016-09-20 11:25:23.727 0:0:0>Enable L2 Cache Errors
  202. 2016-09-20 11:25:26.965 0:0:0>Memory ND Scan
  203. 2016-09-20 11:25:47.250 0:0:0>Enable Memory Errors
  204. 2016-09-20 11:25:47.465 0:0:0>Enable NCU Errors
  205. 2016-09-20 11:25:47.678 0:0:0>Disable COU Data Fwding
  206. 2016-09-20 11:25:48.297 0:0:0>CPU Startup
  207. 2016-09-20 11:25:48.670 0:0:0>Save Restore Test
  208. 2016-09-20 11:25:49.067 0:0:0>SPARC Atomic Instructions Test
  209. 2016-09-20 11:25:49.446 0:0:0>CPU CTU Stick Init
  210. 2016-09-20 11:25:52.685 0:0:0>CPU CTU Stick Test
  211. 2016-09-20 11:25:53.900 0:0:0>CPU Core Stick Test
  212. 2016-09-20 11:25:55.132 0:0:0>CPU Tick Counter Test
  213. 2016-09-20 11:25:56.369 0:0:0>HB PCIE LINK ENABLE
  214. 2016-09-20 11:26:00.319 7:0:0>INFO: /SYS/PM3/CM1/CMP/PCIE_LINK0 trained after 2 attempts
  215. 2016-09-20 11:26:00.779 0:0:0>INFO: /SYS/PM0/CM0/CMP/PCIE_LINK1 trained after 1 attempts
  216. 2016-09-20 11:26:01.201 0:0:0>PCI PROBE
  217. 2016-09-20 11:26:30.689 0:0:0>Enable Floating Point Unit Test
  218. 2016-09-20 11:26:31.073 0:0:0>FPU Move Register Test
  219. 2016-09-20 11:26:31.452 0:0:0>FPU Add Test
  220. 2016-09-20 11:26:31.686 0:0:0>FPU Subtract Test
  221. 2016-09-20 11:26:31.921 0:0:0>FPU Multiply Test
  222. 2016-09-20 11:26:32.156 0:0:0>FPU Divide Test
  223. 2016-09-20 11:26:32.391 0:0:0>FPU Sqrt Test
  224. 2016-09-20 11:26:32.625 0:0:0>FPU Branch Test
  225. 2016-09-20 11:26:34.752 0:0:0>Verify Memory Access
  226. 2016-09-20 11:27:54.295 0:0:0>Memory Address Ascending Test
  227. 2016-09-20 11:28:55.240 0:0:0>Memory Address Descending Test
  228. 2016-09-20 11:29:56.321 0:0:0>Burn In with FGU N Memory Access
  229. 2016-09-20 11:31:15.695 0:0:0>L3Cache Thrashing Test
  230. 2016-09-20 11:31:20.737 0:0:0>System Coherency Single Line
  231. 2016-09-20 11:31:21.128 0:0:0>DRAM ECC test
  232. 2016-09-20 11:31:39.157 0:0:0>Disable Overlap Operation
  233. 2016-09-20 11:31:39.795 0:0:0>L3Cache Flush verify test
  234. 2016-09-20 11:31:40.014 0:0:0>L3Cache Hash Logic Verify test
  235. 2016-09-20 11:31:40.762 0:0:0>L3Cache Set Associativity test
  236. 2016-09-20 11:31:43.313 0:0:0>Enable Overlap Operation
  237. 2016-09-20 11:31:43.954 0:0:0>Graphics Instructions Test
  238. 2016-09-20 11:31:44.189 0:0:0>Graphics Functional Test
  239. 2016-09-20 11:31:44.570 0:0:0>Enable Floating Point Unit Test
  240. 2016-09-20 11:31:44.954 0:0:0>MMU Register Test
  241. 2016-09-20 11:31:45.333 0:0:0>MMU Per Core Initialization
  242. 2016-09-20 11:31:45.569 0:0:0>MMU Per Strand Initialization
  243. 2016-09-20 11:31:45.955 0:0:0>IMMU TLB Demap All Test
  244. 2016-09-20 11:31:46.340 0:0:0>IMMU TLB Demap Page Test
  245. 2016-09-20 11:31:46.721 0:0:0>IMMU TLB Demap Context Test
  246. 2016-09-20 11:31:46.958 0:0:0>IMMU TLB Demap All Pages Test
  247. 2016-09-20 11:31:47.197 0:0:0>DMMU TLB Demap All Test
  248. 2016-09-20 11:31:47.580 0:0:0>DMMU TLB Demap Page Test
  249. 2016-09-20 11:31:47.963 0:0:0>DMMU TLB Demap Context Test
  250. 2016-09-20 11:31:48.200 0:0:0>DMMU TLB Demap All Pages Test
  251. 2016-09-20 11:31:48.437 0:0:0>IMMU Illegal Instruction Trap
  252. 2016-09-20 11:31:48.860 0:0:0>IMMU Fast Ins Translation Miss Trap
  253. 2016-09-20 11:31:49.284 0:0:0>DMMU Real Data Translation Miss Trap
  254. 2016-09-20 11:31:49.717 0:0:0>DMMU Fast Data Translation Miss Trap
  255. 2016-09-20 11:31:50.143 0:0:0>DMMU Fast Access Protection Trap
  256. 2016-09-20 11:31:50.568 0:0:0>DMMU DAE Priv Violation Trap
  257. 2016-09-20 11:31:50.990 0:0:0>DMMU Verify Page Sizes Test
  258. 2016-09-20 11:31:51.465 0:0:0>IMMU Verify Page Sizes Test
  259. 2016-09-20 11:31:51.944 0:0:0>IMMU TLB CAM Parity test
  260. 2016-09-20 11:31:52.163 0:0:0>IMMU TLB Data Parity test
  261. 2016-09-20 11:31:52.381 0:0:0>DMMU TLB CAM Parity test
  262. 2016-09-20 11:31:52.600 0:0:0>DMMU TLB Data Parity test
  263. 2016-09-20 11:31:52.818 0:0:0>MMU Register Array Parity Test
  264. 2016-09-20 11:31:53.066 0:0:0>MMU 8 Kbyte TSB Test
  265. 2016-09-20 11:31:53.305 0:0:0>MMU 64 Kbyte TSB Test
  266. 2016-09-20 11:31:53.548 0:0:0>MMU 4 Mbyte TSB Test
  267. 2016-09-20 11:31:53.789 0:0:0>MMU 256 Mbyte TSB Test
  268. 2016-09-20 11:31:54.027 0:0:0>MMU 2 Gbyte TSB Test
  269. 2016-09-20 11:31:54.268 0:0:0>MMU Per Core Initialization
  270. 2016-09-20 11:31:54.504 0:0:0>MMU Per Strand Initialization
  271. 2016-09-20 11:31:54.886 0:0:0>SPU Crypto MPMUL
  272. 2016-09-20 11:31:56.750 0:0:0>SPU Crypto SHA 512
  273. 2016-09-20 11:31:58.610 0:0:0>SPU Crypto MD5
  274. 2016-09-20 11:32:00.464 0:0:0>SPU Crypto MONTMUL
  275. 2016-09-20 11:32:02.313 0:0:0>SPU Crypto SHA 1
  276. 2016-09-20 11:32:04.180 0:0:0>SPU Crypto MONTSQR
  277. 2016-09-20 11:32:06.034 0:0:0>SPU Crypto SHA 256
  278. 2016-09-20 11:32:07.894 0:0:0>SPU Crypto CRC32 1008
  279. 2016-09-20 11:32:09.750 0:0:0>SPU Crypto AES 128 Encrypt
  280. 2016-09-20 11:32:11.609 0:0:0>SPU Crypto AES 256 Key Decrypt
  281. 2016-09-20 11:32:13.463 0:0:0>SPU Crypto DES 1 Key Encrypt
  282. 2016-09-20 11:32:15.326 0:0:0>SPU Camellia 128 Encrypt
  283. 2016-09-20 11:32:17.184 0:0:0>CPU XCALL Strand Level Test
  284. 2016-09-20 11:32:17.662 0:0:0>CPU XCALL Chip Level Test
  285. 2016-09-20 11:32:18.140 0:0:0>CPU MONDO Strand Level Test
  286. 2016-09-20 11:32:18.560 0:0:0>DEV MONDO Strand Level Test
  287. 2016-09-20 11:32:18.978 0:0:0>Resumable Error Strand Level Test
  288. 2016-09-20 11:32:19.396 0:0:0>Non Resumable Error Strand Level Test
  289. 2016-09-20 11:32:19.806 0:0:0>Allocated TSBs
  290. 2016-09-20 11:32:21.062 0:0:0>Setup the Global TSB
  291. 2016-09-20 11:32:21.077 0:0:0>Setup Supervisor mode
  292. 2016-09-20 11:32:21.476 0:0:0>Display PCI Probed
  293. 2016-09-20 11:32:21.527 0:0:0>Probed PCI devices
  294. N:P | NAC | Address | BDF | VID | DID |RID | SSID | SVID |Wth Spd
  295. 0:0 | /SYS/MB/PCI-SWITCH0/PCIE_LINK0 | 805000100000 | 01:00:0 | 111d | 80ba | 03 | 0000 | 0000 | 8 G3
  296. 0:0 | /SYS/MB/PCI-SWITCH0/PCIE_LINK4 | 805000220000 | 02:04:0 | 111d | 80ba | 03 | 0000 | 0000 | 8 G3
  297. 0:0 | /SYS/MB/PCI-SWITCH5/PCIE_LINK2 | 805000300000 | 03:00:0 | 111d | 80ba | 03 | 0000 | 0000 | 8 G3
  298. 0:0 | /SYS/MB/PCI-SWITCH5/PCIE_LINK4 | 805000420000 | 04:04:0 | 111d | 80ba | 03 | 0000 | 0000 | 0 G1
  299. 0:0 | /SYS/MB/PCI-SWITCH5/PCIE_LINK6 | 805000430000 | 04:06:0 | 111d | 80ba | 03 | 0000 | 0000 | 1 G2
  300. 0:0 | /SYS/MB/USB_CTLR | 805000600000 | 06:00:0 | 1912 | 0014 | 03 | 0000 | 0000 | 1 G2
  301. 0:0 | /SYS/MB/PCI-SWITCH5/PCIE_LINK8 | 805000440000 | 04:08:0 | 111d | 80ba | 03 | 0000 | 0000 | 8 G2
  302. 0:0 | /SYS/RIO/XGBE1 | 805000700000 | 07:00:0 | 8086 | 1528 | 01 | 4848 | 108e | 8 G2
  303. 0:0 | /SYS/RIO/XGBE1 | 805000701000 | 07:00:1 | 8086 | 1528 | 01 | 4848 | 108e | 8 G2
  304. 0:0 | /SYS/MB/PCI-SWITCH5/PCIE_LINK12 | 805000460000 | 04:12:0 | 111d | 80ba | 03 | 0000 | 0000 | 8 G2
  305. 0:0 | /SYS/MB/SASHBA0 | 805000800000 | 08:00:0 | 1000 | 0087 | 05 | 0087 | 1000 | 8 G2
  306. 0:0 | /SYS/MB/PCI-SWITCH0/PCIE_LINK6 | 805000230000 | 02:06:0 | 111d | 80ba | 03 | 0000 | 0000 | 0 G1
  307. 0:0 | /SYS/MB/PCI-SWITCH0/PCIE_LINK12 | 805000260000 | 02:12:0 | 111d | 80ba | 03 | 0000 | 0000 | 0 G1
  308. 0:1 | /SYS/MB/PCI-SWITCH1/PCIE_LINK10 | 805100b00000 | 11:00:0 | 111d | 80bf | 03 | 0000 | 0000 | 8 G3
  309. 0:1 | /SYS/MB/PCI-SWITCH1/PCIE_LINK6 | 805100c30000 | 12:06:0 | 111d | 80bf | 03 | 0000 | 0000 | 0 G1
  310. 0:1 | /SYS/MB/PCI-SWITCH1/PCIE_LINK12 | 805100c60000 | 12:12:0 | 111d | 80bf | 03 | 0000 | 0000 | 0 G1
  311. 1:0 | /SYS/MB/PCI-SWITCH2/PCIE_LINK6 | 80d000f00000 | 15:00:0 | 111d | 80bf | 03 | 0000 | 0000 | 8 G3
  312. 1:0 | /SYS/MB/PCI-SWITCH2/PCIE_LINK4 | 80d001020000 | 16:04:0 | 111d | 80bf | 03 | 0000 | 0000 | 0 G1
  313. 1:0 | /SYS/MB/PCI-SWITCH2/PCIE_LINK10 | 80d001050000 | 16:10:0 | 111d | 80bf | 03 | 0000 | 0000 | 8 G2
  314. 1:0 | /SYS/RCSA/PCIE9/CAR | 80d001200000 | 18:00:0 | 8086 | 10fb | 01 | 7b11 | 108e | 8 G2
  315. 1:0 | /SYS/RCSA/PCIE9/CAR | 80d001201000 | 18:00:1 | 8086 | 10fb | 01 | 7b11 | 108e | 8 G2
  316. 1:1 | /SYS/MB/PCI-SWITCH3/PCIE_LINK12 | 80d101300000 | 19:00:0 | 111d | 80bf | 03 | 0000 | 0000 | 8 G3
  317. 1:1 | /SYS/MB/PCI-SWITCH3/PCIE_LINK8 | 80d101440000 | 20:08:0 | 111d | 80bf | 03 | 0000 | 0000 | 0 G1
  318. 1:1 | /SYS/MB/PCI-SWITCH3/PCIE_LINK14 | 80d101470000 | 20:14:0 | 111d | 80bf | 03 | 0000 | 0000 | 8 G1
  319. 1:1 | /SYS/RCSA/PCIE11/CAR | 80d101600000 | 22:00:0 | 1077 | 2532 | 02 | 0171 | 1077 | 8 G1
  320. 1:1 | /SYS/RCSA/PCIE11/CAR | 80d101601000 | 22:00:1 | 1077 | 2532 | 02 | 0171 | 1077 | 8 G1
  321. 6:0 | /SYS/MB/PCI-SWITCH1/PCIE_LINK0 | 835001700000 | 23:00:0 | 111d | 80bf | 03 | 0000 | 0000 | 8 G3
  322. 6:0 | /SYS/MB/PCI-SWITCH1/PCIE_LINK8 | 835001840000 | 24:08:0 | 111d | 80bf | 03 | 0000 | 0000 | 0 G1
  323. 6:0 | /SYS/MB/PCI-SWITCH1/PCIE_LINK14 | 835001870000 | 24:14:0 | 111d | 80bf | 03 | 0000 | 0000 | 8 G2
  324. 6:0 | /SYS/RCSA/PCIE5/CAR | 835001a00000 | 26:00:0 | 8086 | 10fb | 01 | 7b11 | 108e | 8 G2
  325. 6:0 | /SYS/RCSA/PCIE5/CAR | 835001a01000 | 26:00:1 | 8086 | 10fb | 01 | 7b11 | 108e | 8 G2
  326. 6:1 | /SYS/MB/PCI-SWITCH2/PCIE_LINK2 | 835101b00000 | 27:00:0 | 111d | 80bf | 03 | 0000 | 0000 | 8 G3
  327. 6:1 | /SYS/MB/PCI-SWITCH2/PCIE_LINK8 | 835101c40000 | 28:08:0 | 111d | 80bf | 03 | 0000 | 0000 | 0 G1
  328. 6:1 | /SYS/MB/PCI-SWITCH2/PCIE_LINK14 | 835101c70000 | 28:14:0 | 111d | 80bf | 03 | 0000 | 0000 | 8 G1
  329. 6:1 | /SYS/RCSA/PCIE7/CAR | 835101e00000 | 30:00:0 | 1077 | 2532 | 02 | 0171 | 1077 | 8 G1
  330. 6:1 | /SYS/RCSA/PCIE7/CAR | 835101e01000 | 30:00:1 | 1077 | 2532 | 02 | 0171 | 1077 | 8 G1
  331. 7:0 | /SYS/MB/PCI-SWITCH3/PCIE_LINK0 | 83d001f00000 | 31:00:0 | 111d | 80bf | 03 | 0000 | 0000 | 8 G3
  332. 7:0 | /SYS/MB/PCI-SWITCH3/PCIE_LINK4 | 83d002020000 | 32:04:0 | 111d | 80bf | 03 | 0000 | 0000 | 0 G1
  333. 7:0 | /SYS/MB/PCI-SWITCH3/PCIE_LINK10 | 83d002050000 | 32:10:0 | 111d | 80bf | 03 | 0000 | 0000 | 0 G1
  334. 7:1 | /SYS/MB/PCI-SWITCH4/PCIE_LINK0 | 83d102300000 | 35:00:0 | 111d | 80ba | 03 | 0000 | 0000 | 8 G3
  335. 7:1 | /SYS/MB/PCI-SWITCH4/PCIE_LINK4 | 83d102420000 | 36:04:0 | 111d | 80ba | 03 | 0000 | 0000 | 0 G1
  336. 7:1 | /SYS/MB/PCI-SWITCH4/PCIE_LINK8 | 83d102440000 | 36:08:0 | 111d | 80ba | 03 | 0000 | 0000 | 0 G1
  337. 7:1 | /SYS/MB/PCI-SWITCH4/PCIE_LINK12 | 83d102460000 | 36:12:0 | 111d | 80ba | 03 | 0000 | 0000 | 8 G3
  338. 7:1 | /SYS/MB/PCI-SWITCH6/PCIE_LINK0 | 83d102700000 | 39:00:0 | 111d | 80ba | 03 | 0000 | 0000 | 8 G3
  339. 7:1 | /SYS/MB/PCI-SWITCH6/PCIE_LINK4 | 83d102820000 | 40:04:0 | 111d | 80ba | 03 | 0000 | 0000 | 8 G2
  340. 7:1 | /SYS/RIO/XGBE0 | 83d102900000 | 41:00:0 | 8086 | 1528 | 01 | 4848 | 108e | 8 G2
  341. 7:1 | /SYS/RIO/XGBE0 | 83d102901000 | 41:00:1 | 8086 | 1528 | 01 | 4848 | 108e | 8 G2
  342. 7:1 | /SYS/MB/PCI-SWITCH6/PCIE_LINK6 | 83d102830000 | 40:06:0 | 111d | 80ba | 03 | 0000 | 0000 | 1 G2
  343. 7:1 | /SYS/RIO/USB_CTLR | 83d102a00000 | 42:00:0 | 1912 | 0014 | 03 | 0000 | 0000 | 1 G2
  344. 7:1 | /SYS/MB/PCI-SWITCH6/PCIE_LINK7 | 83d102838000 | 40:07:0 | 111d | 80ba | 03 | 0000 | 0000 | 1 G1
  345. 7:1 | /SYS/MB/SP | 83d102b00000 | 43:00:0 | 102b | 0522 | 05 | 0102 | 19a2 | 1 G1
  346. 7:1 | /SYS/MB/PCI-SWITCH6/PCIE_LINK8 | 83d102840000 | 40:08:0 | 111d | 80ba | 03 | 0000 | 0000 | 0 G1
  347. 7:1 | /SYS/MB/PCI-SWITCH6/PCIE_LINK12 | 83d102860000 | 40:12:0 | 111d | 80ba | 03 | 0000 | 0000 | 8 G2
  348. 7:1 | /SYS/MB/SASHBA1 | 83d102d00000 | 45:00:0 | 1000 | 0087 | 05 | 0087 | 1000 | 8 G2
  349.  
  350. 2016-09-20 11:32:22.686 0:0:0>Block Memory Test
  351. 2016-09-20 11:32:22.865 0:0:0>. . . . . . . . .
  352. 2016-09-20 11:33:32.431 0:0:0>Cross Node Block Memory Test
  353. 2016-09-20 11:33:32.914 0:0:0>. . . . . . . . .
  354. 2016-09-20 11:35:56.779 0:0:0>CHECK PCI TOPOLOGY
  355.  
  356.  
  357. 2016-09-20 11:35:57.052 0:0:0> NAC VID DID Width Speed Status
  358. 2016-09-20 11:35:57.071 0:0:0>-----------------------------------------------------------------------------
  359. 2016-09-20 11:35:57.090 0:0:0> /SYS/PM0/CM0/CMP/PCIE_LINK0 108e b008 8 G3 Clean
  360. 2016-09-20 11:35:57.109 0:0:0> /SYS/PM0/CM0/CMP/PCIE_LINK1 108e b008 8 G3 Clean
  361. 2016-09-20 11:35:57.128 0:0:0> /SYS/PM0/CM1/CMP/PCIE_LINK0 108e b008 8 G3 Clean
  362. 2016-09-20 11:35:57.147 0:0:0> /SYS/PM0/CM1/CMP/PCIE_LINK1 108e b008 8 G3 Clean
  363. 2016-09-20 11:35:57.166 0:0:0> /SYS/PM1/CM0/CMP/PCIE_LINK0 ------------------------------
  364. 2016-09-20 11:35:57.185 0:0:0> /SYS/PM1/CM0/CMP/PCIE_LINK1 ------------------------------
  365. 2016-09-20 11:35:57.204 0:0:0> /SYS/PM1/CM1/CMP/PCIE_LINK0 ------------------------------
  366. 2016-09-20 11:35:57.223 0:0:0> /SYS/PM1/CM1/CMP/PCIE_LINK1 ------------------------------
  367. 2016-09-20 11:35:57.242 0:0:0> /SYS/PM2/CM0/CMP/PCIE_LINK0 ------------------------------
  368. 2016-09-20 11:35:57.261 0:0:0> /SYS/PM2/CM0/CMP/PCIE_LINK1 ------------------------------
  369. 2016-09-20 11:35:57.280 0:0:0> /SYS/PM2/CM1/CMP/PCIE_LINK0 ------------------------------
  370. 2016-09-20 11:35:57.299 0:0:0> /SYS/PM2/CM1/CMP/PCIE_LINK1 ------------------------------
  371. 2016-09-20 11:35:57.320 0:0:0> /SYS/PM3/CM0/CMP/PCIE_LINK0 108e b008 8 G3 Clean
  372. 2016-09-20 11:35:57.338 0:0:0> /SYS/PM3/CM0/CMP/PCIE_LINK1 108e b008 8 G3 Clean
  373. 2016-09-20 11:35:57.358 0:0:0> /SYS/PM3/CM1/CMP/PCIE_LINK0 108e b008 8 G3 Clean
  374. 2016-09-20 11:35:57.378 0:0:0> /SYS/PM3/CM1/CMP/PCIE_LINK1 108e b008 8 G3 Clean
  375. 2016-09-20 11:35:57.397 0:0:0> /SYS/MB/PCI-SWITCH0/PCIE_LINK0 111d 80ba 8 G3 Clean
  376. 2016-09-20 11:35:57.416 0:0:0> /SYS/MB/PCI-SWITCH0/PCIE_LINK2 ------------------------------
  377. 2016-09-20 11:35:57.438 0:0:0> /SYS/MB/PCI-SWITCH0/PCIE_LINK4 111d 80ba 8 G3 Clean
  378. 2016-09-20 11:35:57.457 0:0:0> /SYS/MB/PCI-SWITCH0/PCIE_LINK6 111d 80ba 0 G1 Clean
  379. 2016-09-20 11:35:57.477 0:0:0> /SYS/RCSA/PCIE1/CAR ------------------------------
  380. 2016-09-20 11:35:57.497 0:0:0> /SYS/MB/PCI-SWITCH0/PCIE_LINK8 ------------------------------
  381. 2016-09-20 11:35:57.516 0:0:0> /SYS/MB/PCI-SWITCH0/PCIE_LINK12 111d 80ba 0 G1 Clean
  382. 2016-09-20 11:35:57.535 0:0:0> /SYS/RCSA/PCIE2/CAR ------------------------------
  383. 2016-09-20 11:35:57.556 0:0:0> /SYS/MB/PCI-SWITCH1/PCIE_LINK0 111d 80bf 8 G3 Clean
  384. 2016-09-20 11:35:57.575 0:0:0> /SYS/MB/PCI-SWITCH1/PCIE_LINK2 ------------------------------
  385. 2016-09-20 11:35:57.596 0:0:0> /SYS/MB/PCI-SWITCH1/PCIE_LINK4 ------------------------------
  386. 2016-09-20 11:35:57.619 0:0:0> /SYS/MB/PCI-SWITCH1/PCIE_LINK10 111d 80bf 8 G3 Clean
  387. 2016-09-20 11:35:57.638 0:0:0> /SYS/MB/PCI-SWITCH1/PCIE_LINK6 111d 80bf 0 G1 Clean
  388. 2016-09-20 11:35:57.657 0:0:0> /SYS/RCSA/PCIE3/CAR ------------------------------
  389. 2016-09-20 11:35:57.678 0:0:0> /SYS/MB/PCI-SWITCH1/PCIE_LINK12 111d 80bf 0 G1 Clean
  390. 2016-09-20 11:35:57.697 0:0:0> /SYS/RCSA/PCIE4/CAR ------------------------------
  391. 2016-09-20 11:35:57.717 0:0:0> /SYS/MB/PCI-SWITCH1/PCIE_LINK14 111d 80bf 8 G2 Clean
  392. 2016-09-20 11:35:57.737 0:0:0> /SYS/RCSA/PCIE5/CAR 8086 10fb 8 G2 Clean
  393. 2016-09-20 11:35:57.757 0:0:0> /SYS/MB/PCI-SWITCH1/PCIE_LINK8 111d 80bf 0 G1 Clean
  394. 2016-09-20 11:35:57.776 0:0:0> /SYS/RCSA/PCIE6/CAR ------------------------------
  395. 2016-09-20 11:35:57.797 0:0:0> /SYS/MB/PCI-SWITCH2/PCIE_LINK0 ------------------------------
  396. 2016-09-20 11:35:57.818 0:0:0> /SYS/MB/PCI-SWITCH2/PCIE_LINK2 111d 80bf 8 G3 Clean
  397. 2016-09-20 11:35:57.837 0:0:0> /SYS/MB/PCI-SWITCH2/PCIE_LINK6 111d 80bf 8 G3 Clean
  398. 2016-09-20 11:35:57.856 0:0:0> /SYS/MB/PCI-SWITCH2/PCIE_LINK12 ------------------------------
  399. 2016-09-20 11:35:57.878 0:0:0> /SYS/MB/PCI-SWITCH2/PCIE_LINK14 111d 80bf 8 G1 Clean
  400. 2016-09-20 11:35:57.897 0:0:0> /SYS/RCSA/PCIE7/CAR 1077 2532 8 G1 Clean
  401. 2016-09-20 11:35:57.916 0:0:0> /SYS/MB/PCI-SWITCH2/PCIE_LINK10 111d 80bf 8 G2 Clean
  402. 2016-09-20 11:35:57.935 0:0:0> /SYS/RCSA/PCIE9/CAR 8086 10fb 8 G2 Clean
  403. 2016-09-20 11:35:57.954 0:0:0> /SYS/MB/PCI-SWITCH2/PCIE_LINK8 111d 80bf 0 G1 Clean
  404. 2016-09-20 11:35:57.973 0:0:0> /SYS/RCSA/PCIE8/CAR ------------------------------
  405. 2016-09-20 11:35:57.993 0:0:0> /SYS/MB/PCI-SWITCH2/PCIE_LINK4 111d 80bf 0 G1 Clean
  406. 2016-09-20 11:35:58.012 0:0:0> /SYS/RCSA/PCIE10/CAR ------------------------------
  407. 2016-09-20 11:35:58.033 0:0:0> /SYS/MB/PCI-SWITCH3/PCIE_LINK0 111d 80bf 8 G3 Clean
  408. 2016-09-20 11:35:58.052 0:0:0> /SYS/MB/PCI-SWITCH3/PCIE_LINK2 ------------------------------
  409. 2016-09-20 11:35:58.073 0:0:0> /SYS/MB/PCI-SWITCH3/PCIE_LINK6 ------------------------------
  410. 2016-09-20 11:35:58.094 0:0:0> /SYS/MB/PCI-SWITCH3/PCIE_LINK12 111d 80bf 8 G3 Clean
  411. 2016-09-20 11:35:58.113 0:0:0> /SYS/MB/PCI-SWITCH3/PCIE_LINK14 111d 80bf 8 G1 Clean
  412. 2016-09-20 11:35:58.132 0:0:0> /SYS/RCSA/PCIE11/CAR 1077 2532 8 G1 Clean
  413. 2016-09-20 11:35:58.151 0:0:0> /SYS/MB/PCI-SWITCH3/PCIE_LINK8 111d 80bf 0 G1 Clean
  414. 2016-09-20 11:35:58.170 0:0:0> /SYS/RCSA/PCIE12/CAR ------------------------------
  415. 2016-09-20 11:35:58.191 0:0:0> /SYS/MB/PCI-SWITCH3/PCIE_LINK10 111d 80bf 0 G1 Clean
  416. 2016-09-20 11:35:58.209 0:0:0> /SYS/RCSA/PCIE13/CAR ------------------------------
  417. 2016-09-20 11:35:58.230 0:0:0> /SYS/MB/PCI-SWITCH3/PCIE_LINK4 111d 80bf 0 G1 Clean
  418. 2016-09-20 11:35:58.249 0:0:0> /SYS/RCSA/PCIE14/CAR ------------------------------
  419. 2016-09-20 11:35:58.269 0:0:0> /SYS/MB/PCI-SWITCH4/PCIE_LINK0 111d 80ba 8 G3 Clean
  420. 2016-09-20 11:35:58.290 0:0:0> /SYS/MB/PCI-SWITCH4/PCIE_LINK2 ------------------------------
  421. 2016-09-20 11:35:58.310 0:0:0> /SYS/MB/PCI-SWITCH4/PCIE_LINK6 ------------------------------
  422. 2016-09-20 11:35:58.329 0:0:0> /SYS/MB/PCI-SWITCH4/PCIE_LINK8 111d 80ba 0 G1 Clean
  423. 2016-09-20 11:35:58.349 0:0:0> /SYS/RCSA/PCIE15/CAR ------------------------------
  424. 2016-09-20 11:35:58.369 0:0:0> /SYS/MB/PCI-SWITCH4/PCIE_LINK12 111d 80ba 8 G3 Clean
  425. 2016-09-20 11:35:58.388 0:0:0> /SYS/MB/PCI-SWITCH4/PCIE_LINK4 111d 80ba 0 G1 Clean
  426. 2016-09-20 11:35:58.408 0:0:0> /SYS/RCSA/PCIE16/CAR ------------------------------
  427. 2016-09-20 11:35:58.429 0:0:0> /SYS/MB/PCI-SWITCH5/PCIE_LINK2 111d 80ba 8 G3 Clean
  428. 2016-09-20 11:35:58.448 0:0:0> /SYS/MB/PCI-SWITCH5/PCIE_LINK4 111d 80ba 0 G1 Clean
  429. 2016-09-20 11:35:58.467 0:0:0> /SYS/MB/PCI-SWITCH5/PCIE_LINK6 111d 80ba 1 G2 Clean
  430. 2016-09-20 11:35:58.487 0:0:0> /SYS/MB/USB_CTLR 1912 14 1 G2 Clean
  431. 2016-09-20 11:35:58.506 0:0:0> /SYS/MB/PCI-SWITCH5/PCIE_LINK8 111d 80ba 8 G2 Clean
  432. 2016-09-20 11:35:58.525 0:0:0> /SYS/RIO/XGBE1 8086 1528 8 G2 Clean
  433. 2016-09-20 11:35:58.544 0:0:0> /SYS/RIO/XGBE1 8086 1528 8 G2 Clean
  434. 2016-09-20 11:35:58.563 0:0:0> /SYS/MB/PCI-SWITCH5/PCIE_LINK12 111d 80ba 8 G2 Clean
  435. 2016-09-20 11:35:58.582 0:0:0> /SYS/MB/SASHBA0 1000 87 8 G2 Clean
  436. 2016-09-20 11:35:58.602 0:0:0> /SYS/MB/PCI-SWITCH6/PCIE_LINK0 111d 80ba 8 G3 Clean
  437. 2016-09-20 11:35:58.621 0:0:0> /SYS/MB/PCI-SWITCH6/PCIE_LINK4 111d 80ba 8 G2 Clean
  438. 2016-09-20 11:35:58.640 0:0:0> /SYS/RIO/XGBE0 8086 1528 8 G2 Clean
  439. 2016-09-20 11:35:58.660 0:0:0> /SYS/RIO/XGBE0 8086 1528 8 G2 Clean
  440. 2016-09-20 11:35:58.678 0:0:0> /SYS/MB/PCI-SWITCH6/PCIE_LINK6 111d 80ba 1 G2 Clean
  441. 2016-09-20 11:35:58.698 0:0:0> /SYS/RIO/USB_CTLR 1912 14 1 G2 Clean
  442. 2016-09-20 11:35:58.718 0:0:0> /SYS/MB/PCI-SWITCH6/PCIE_LINK7 111d 80ba 1 G1 Clean
  443. 2016-09-20 11:35:58.737 0:0:0> /SYS/MB/SP 102b 522 1 G1 Clean
  444. 2016-09-20 11:35:58.756 0:0:0> /SYS/MB/PCI-SWITCH6/PCIE_LINK8 111d 80ba 0 G1 Clean
  445. 2016-09-20 11:35:58.776 0:0:0> /SYS/MB/PCI-SWITCH6/PCIE_LINK12 111d 80ba 8 G2 Clean
  446. 2016-09-20 11:35:58.795 0:0:0> /SYS/MB/SASHBA1 1000 87 8 G2 Clean
  447. 2016-09-20 11:35:58.821 0:0:0>PCI Configuration check
  448. 2016-09-20 11:35:58.839 0:0:0>CPU Finish up
  449. 2016-09-20 11:35:59.216 0:0:0>Disable All NCU Errors
  450. 2016-09-20 11:35:59.434 0:0:0>Disable Memory Errors
  451. 2016-09-20 11:35:59.651 0:0:0>Disable All CLU Errors
  452. 2016-09-20 11:36:00.270 0:0:0>Disable All COU Errors
  453. 2016-09-20 11:36:00.889 0:0:0>Disable All L2 Cache Errors
  454. 2016-09-20 11:36:01.271 0:0:0>Disable All L3 Cache Errors
  455. 2016-09-20 11:36:01.489 0:0:0>Disable All CPU Errors
  456. 2016-09-20 11:36:01.869 0:0:0>Setup CPU MBISI
  457. 2016-09-20 11:36:02.084 0:0:0>POST Phase Complete
  458. 2016-09-20 11:36:02.094 0:0:0>POST Exit reason = 0
  459. 2016-09-20 11:36:02.103 0:0:0>Board Phase runtime: 00:12:05, Total CPUs 512, Total DRAM 1024 GB
  460. 2016-09-20 11:36:02.120 0:0:0>End of POST
  461. 2016-09-20 11:36:08 7:00:0> NOTICE: SPARC-T5 Revision 1.2 Speed 3600MHz
  462. 2016-09-20 11:36:08 0:00:0> NOTICE: SPARC-T5 Revision 1.2 Speed 3600MHz
  463. 2016-09-20 11:36:08 1:00:0> NOTICE: SPARC-T5 Revision 1.2 Speed 3600MHz
  464. 2016-09-20 11:36:08 6:00:0> NOTICE: SPARC-T5 Revision 1.2 Speed 3600MHz
  465. 2016-09-20 11:36:25 0:00:0> NOTICE: Initializing Memory
  466. 2016-09-20 11:37:07 0:00:0> NOTICE: Reconfiguring System
  467. 2016-09-20 11:37:55 0:00:0> NOTICE: Initializing MCU 0 Memory Link 0
  468. 2016-09-20 11:38:10 0:00:0> NOTICE: Initializing MCU 0 Memory Link 1
  469. 2016-09-20 11:38:27 0:00:0> NOTICE: Initializing MCU 1 Memory Link 0
  470. 2016-09-20 11:38:42 0:00:0> NOTICE: Initializing MCU 1 Memory Link 1
  471. 2016-09-20 11:38:59 0:00:0> NOTICE: Initializing MCU 2 Memory Link 0
  472. 2016-09-20 11:39:14 0:00:0> NOTICE: Initializing MCU 2 Memory Link 1
  473. 2016-09-20 11:39:31 0:00:0> NOTICE: Initializing MCU 3 Memory Link 0
  474. 2016-09-20 11:39:48 0:00:0> NOTICE: Initializing MCU 3 Memory Link 1
  475. 2016-09-20 11:40:12 0:00:0> NOTICE: Pausing for 120 seconds for Coherence Link tuning
  476. 2016-09-20 11:42:12 0:00:0> NOTICE: Found optimal settings
  477. 2016-09-20 11:43:55 0:00:0> NOTICE: Booting config = sep-2016
  478. [CPU 00:00:0] Hypervisor version: @(#)Hypervisor 1.15.4 2016/02/20 14:11
  479. 2016-09-20 10:42:02 SP> NOTICE: Start Host in progress: Step 5 of 7
  480. 2016-09-20 10:42:02 SP> NOTICE: Start Host in progress: Step 6 of 7
  481. NOTICE: Entering OpenBoot.
  482. NOTICE: Fetching Guest M2016-09-20 10:42:35 SP> NOTICE: Start Host in progress: Step 7 of 7
  483. D from HV.
  484. NOTICE: Starting additional cpus.
  485. NOTICE: Initializing LDC services.
  486. NOTICE: Probing PCI devices.
  487. NOTICE: Finished PCI probing.
  488.  
  489. SPARC T5-8, No Keyboard
  490. Copyright (c) 1998, 2016, Oracle and/or its affiliates. All rights reserved.
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