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May 29th, 2015
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  1. Hello World!
  2. Successfully read input file
  3. Initialization done, starting playback now
  4. Initial playback GPU state setup done
  5. Writing 0x00000001 to register
  6. 0x004018f0 <-- Command List Trigger
  7. Waiting for operation to finish..
  8. Writing 0x03000000 to register 0x00400c00
  9. Writing 0x04339ed0 to register 0x00400c04
  10.  
  11. Writing 0x02000100 to register 0x00400c0c
  12. Writing 0x019000f0 to register 0x00400c08
  13. Writing 0x00001004 to register 0x00400c10
  14. Writing 0x00000001 to regis
  15. ter 0x00400c18
  16. Waiting for operation to finish..
  17. Writing 0x03000000 to register 0x00400010
  18. Writing 0x03010000 to register 0x00400014
  19. Writing 0x000000ff to
  20. register 0x00400018
  21. Writing 0x00000201 to register 0x0040001c <-- Memory Fill Control 1
  22. Waiting for operation to finish..
  23. Writing 0x03060000 to register
  24. 0x00400020
  25. Writing 0x03070000 to register 0x00400024
  26. Writing 0x00ffffff to register 0x00400028
  27. Writing 0x00000201 to register 0x0040002c <-- Memory Fill
  28. Control 2
  29. Waiting for operation to finish..
  30. Writing 0x0435c94a to register 0x004018e8 <-- Command List Address
  31. Writing 0x00000150 to register 0x004018e0
  32. <-- Command List Size
  33. Load 0x540 bytes from file offset 0x4e5c to 0x21ae4a50 (i.e. vaddr 0x15ae4a50)
  34. Writing 0x00000001 to register 0x004018f0 <-- Comm
  35. and List Trigger
  36. Waiting for operation to finish..
  37. Writing 0x041c8746 to register 0x004018e8 <-- Command List Address
  38. Writing 0x00000020 to register 0x00
  39. 4018e0 <-- Command List Size
  40. Load 0x80 bytes from file offset 0x539c to 0x20e43a30 (i.e. vaddr 0x14e43a30)
  41. Writing 0x00000001 to register 0x004018f0 <--
  42. Command List Trigger
  43. Waiting for operation to finish..
  44. Writing 0x041c874a to register 0x004018e8 <-- Command List Address
  45. Writing 0x00000020 to register
  46. 0x004018e0 <-- Command List Size
  47. Load 0x80 bytes from file offset 0x541c to 0x20e43a50 (i.e. vaddr 0x14e43a50)
  48. Writing 0x00000001 to register 0x004018f
  49. 0 <-- Command List Trigger
  50. Waiting for operation to finish..
  51. Writing 0x00000000 to register 0x00400010
  52. Writing 0x00000000 to register 0x00400014
  53. Writing 0
  54. x00000000 to register 0x00400018
  55. Writing 0x00000001 to register 0x0040001c <-- Memory Fill Control 1
  56. Waiting for operation to finish..
  57. Writing 0x03060000
  58. to register 0x00400020
  59. Writing 0x03070000 to register 0x00400024
  60. Writing 0x00ffffff to register 0x00400028
  61. Writing 0x00000201 to register 0x0040002c <--
  62. Memory Fill Control 2
  63. Waiting for operation to finish..
  64. Writing 0x0435c974 to register 0x004018e8 <-- Command List Address
  65. Writing 0x00000780 to registe
  66. r 0x004018e0 <-- Command List Size
  67. Load 0x1e00 bytes from file offset 0x549c to 0x21ae4ba0 (i.e. vaddr 0x15ae4ba0)
  68. Writing 0x00000001 to register 0x0040
  69. 18f0 <-- Command List Trigger
  70. Waiting for operation to finish..
  71. Writing 0x041b7f2a to register 0x004018e8 <-- Command List Address
  72. Writing 0x00000020 to
  73. register 0x004018e0 <-- Command List Size
  74. Load 0x80 bytes from file offset 0x541c to 0x20dbf950 (i.e. vaddr 0x14dbf950)
  75. Writing 0x00000001 to register 0
  76. x004018f0 <-- Command List Trigger
  77. Waiting for operation to finish..
  78. Writing 0x0435ca64 to register 0x004018e8 <-- Command List Address
  79. Writing 0x0000105
  80. 0 to register 0x004018e0 <-- Command List Size
  81. Load 0x4140 bytes from file offset 0x729c to 0x21ae5320 (i.e. vaddr 0x15ae5320)
  82. Load 0x7c bytes from file
  83. offset 0xb3dc to 0x217236f4 (i.e. vaddr 0x157236f4)
  84. Writing 0x00000001 to register 0x004018f0 <-- Command List Trigger
  85. Waiting for operation to finish.
  86. .
  87. Writing 0x03000000 to register 0x00400c00
  88. Writing 0x0431f8ea to register 0x00400c04
  89. Writing 0x02000100 to register 0x00400c0c
  90. Writing 0x019000f0 to regi
  91. ster 0x00400c08
  92. Writing 0x00001004 to register 0x00400c10
  93. Writing 0x00000001 to register 0x00400c18
  94. Waiting for operation to finish..
  95. Writing 0x0435cc6e t
  96. o register 0x004018e8 <-- Command List Address
  97. Writing 0x00000080 to register 0x004018e0 <-- Command List Size
  98. Load 0x200 bytes from file offset 0xb458
  99. to 0x21ae6370 (i.e. vaddr 0x15ae6370)
  100. Writing 0x00000001 to register 0x004018f0 <-- Command List Trigger
  101. Waiting for operation to finish..
  102. Writing 0x0300
  103. 0000 to register 0x00400010
  104. Writing 0x03010000 to register 0x00400014
  105. Writing 0x000000ff to register 0x00400018
  106. Writing 0x00000201 to register 0x0040001c
  107. <-- Memory Fill Control 1
  108. Waiting for operation to finish..
  109. Writing 0x03060000 to register 0x00400020
  110. Writing 0x03070000 to register 0x00400024
  111. Writing 0
  112. x00ffffff to register 0x00400028
  113. Writing 0x00000201 to register 0x0040002c <-- Memory Fill Control 2
  114. Waiting for operation to finish..
  115. Writing 0x0435cc7e
  116. to register 0x004018e8 <-- Command List Address
  117. Writing 0x00001690 to register 0x004018e0 <-- Command List Size
  118. Load 0x5a40 bytes from file offset 0xb6
  119. 58 to 0x21ae63f0 (i.e. vaddr 0x15ae63f0)
  120. Load 0x7c bytes from file offset 0xb3dc to 0x217236f4 (i.e. vaddr 0x157236f4)
  121. Writing 0x00000001 to register 0x
  122. 004018f0 <-- Command List Trigger
  123. Waiting for operation to finish..
  124. Writing 0x03000000 to register 0x00400c00
  125. Writing 0x04308b44 to register 0x00400c04
  126. Wr
  127. iting 0x02000100 to register 0x00400c0c
  128. Writing 0x014000f0 to register 0x00400c08
  129. Writing 0x00001004 to register 0x00400c10
  130. Writing 0x00000001 to registe
  131. r 0x00400c18
  132. Waiting for operation to finish..
  133. Reached end of current frame
  134. Writing 0x21a15b90 to register 0x00400468
  135. Writing 0x21942c60 to register 0x004
  136. 00494
  137. Writing 0x000002d0 to register 0x00400490
  138. Writing 0x00000121 to register 0x00400470
  139. Writing 0x00000000 to register 0x00400478
  140. Writing 0x2187de30 to
  141. register 0x00400568
  142. Writing 0x00000000 to register 0x00400594
  143. Writing 0x000002d0 to register 0x00400590
  144. Writing 0x00000101 to register 0x00400570
  145. Writing
  146. 0x00000000 to register 0x00400578
  147. Writing 0x0434b814 to register 0x004018e8 <-- Command List Address
  148. Writing 0x00000080 to register 0x004018e0 <-- Comma
  149. nd List Size
  150. Load 0x200 bytes from file offset 0x11098 to 0x21a5c0a0 (i.e. vaddr 0x15a5c0a0)
  151. Writing 0x00000001 to register 0x004018f0 <-- Command List
  152. Trigger
  153. Waiting for operation to finish..
  154. Writing 0x03000000 to register 0x00400010
  155. Writing 0x03010000 to register 0x00400014
  156. Writing 0x000000ff to regist
  157. er 0x00400018
  158. Writing 0x00000201 to register 0x0040001c <-- Memory Fill Control 1
  159. Waiting for operation to finish..
  160. Writing 0x03060000 to register 0x0040
  161. 0020
  162. Writing 0x03070000 to register 0x00400024
  163. Writing 0x00ffffff to register 0x00400028
  164. Writing 0x00000201 to register 0x0040002c <-- Memory Fill Contro
  165. l 2
  166. Waiting for operation to finish..
  167. Writing 0x0434b824 to register 0x004018e8 <-- Command List Address
  168. Writing 0x00000150 to register 0x004018e0 <-- Co
  169. mmand List Size
  170. Load 0x540 bytes from file offset 0x11298 to 0x21a5c120 (i.e. vaddr 0x15a5c120)
  171. Writing 0x00000001 to register 0x004018f0 <-- Command Li
  172. st Trigger
  173. Waiting for operation to finish..
  174. Writing 0x041d8d94 to register 0x004018e8 <-- Command List Address
  175. Writing 0x0000a8b0 to register 0x004018e0
  176. <-- Command List Size
  177. Load 0x2a2c0 bytes from file offset 0x117d8 to 0x20ec6ca0 (i.e. vaddr 0x14ec6ca0)
  178. Load 0x400 bytes from file offset 0x3ba98 to 0x
  179. 202ea000 (i.e. vaddr 0x142ea000)
  180. Load 0x400 bytes from file offset 0x3ba98 to 0x202ea000 (i.e. vaddr 0x142ea000)
  181. Load 0x7c44 VRAM bytes from file offset
  182. 0x3be98 to 0x1846300c (i.e. vaddr 0x1f46300c)
  183. -> 0x400 to 0x1846300c (i.e. vaddr 0x1f46300c)
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