MEMORY {VECS: org = 0h, len = 200h

		EPROM: org = 200h , len = 99800h
		SRAM: org = 2000000h , len = 8000h
		IP_RAM: org = 1400000h , len = 10000h
		SDRAM: org = 3000000h , len = 1000000h
		ID_RAM: org = 80000000h , len = 10000h
		AD: org = 1000000h, len = 2h
		}

SECTIONS
{
	.cinit :> EPROM
	.const :> EPROM
	.text :> EPROM
	.switch : > EPROM
	.bss :> ID_RAM
	.far :> SDRAM
	.stack :> ID_RAM
	.system :> SDRAM
	.cio :> SDRAM
	vectors :> VECS
}