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device_tree.dts

Vidh
Jul 25th, 2016
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  1. /*
  2. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9.  
  10. #include "am33xx.dtsi"
  11. #include "am335x-bone-common.dtsi"
  12.  
  13. / {
  14. model = "TI AM335x BeagleBone Black";
  15. compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
  16. };
  17.  
  18. &ldo3_reg {
  19. regulator-min-microvolt = <1800000>;
  20. regulator-max-microvolt = <1800000>;
  21. regulator-always-on;
  22. };
  23.  
  24. &mmc1 {
  25. vmmc-supply = <&vmmcsd_fixed>;
  26. };
  27.  
  28. &mmc2 {
  29. vmmc-supply = <&vmmcsd_fixed>;
  30. pinctrl-names = "default";
  31. pinctrl-0 = <&emmc_pins>;
  32. bus-width = <8>;
  33. status = "okay";
  34. };
  35.  
  36. &sgx {
  37. status = "okay";
  38. };
  39.  
  40. &am33xx_pinmux {
  41. nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
  42. pinctrl-single,pins = <
  43. 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
  44. 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  45. 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  46. 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  47. 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  48. 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  49. 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  50. 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  51. 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  52. 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  53. 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  54. 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  55. 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  56. 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  57. 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  58. 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  59. 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
  60. 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
  61. 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
  62. 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
  63. 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
  64. >;
  65. };
  66. nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
  67. pinctrl-single,pins = <
  68. 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
  69. >;
  70. };
  71.  
  72. mcasp0_pins: mcasp0_pins {
  73. pinctrl-single,pins = <
  74. //0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahclkx.mcasp0_ahclkx MLCK */
  75. 0x190 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx BLCK */
  76. 0x194 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx LRCLK */
  77. 0x198 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahclkr.mcasp0_axr0 DAC_SDATA*/
  78. 0x19c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2 ADC_SDATA*/
  79. // 0x190 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx BLCK */
  80. // 0x198 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0 */
  81. // 0x06c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.GPIO1_27 - CLOCK GATE*/
  82. >;
  83. };
  84.  
  85. // mcasp0_pins_sleep: mcasp0_pins_sleep {
  86. // pinctrl-single,pins = <
  87. // 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkx.mcasp0_ahclkx */
  88. // 0x19c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkr.mcasp0_axr2 */
  89. // 0x194 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_fsx.mcasp0_fsx */
  90. // 0x190 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_aclkx.mcasp0_aclkx */
  91. // 0x078 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.GPIO1_60 */
  92. // >;
  93. // };
  94. //
  95. //0x1a0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp1_aclkx_mux2 */
  96. //0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp1_fsx_mux2 */
  97. //0x1a8 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* mcasp1_axr0_mux2 */
  98. //0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp1_axr1_mux1 */
  99.  
  100.  
  101. };
  102.  
  103. &lcdc {
  104. status = "okay";
  105. port {
  106. lcdc_0: endpoint@0 {
  107. remote-endpoint = <&hdmi_0>;
  108. };
  109. };
  110. };
  111.  
  112. &i2c0 {
  113. tda19988 {
  114. compatible = "nxp,tda998x";
  115. reg = <0x70>;
  116. pinctrl-names = "default", "off";
  117. pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
  118. pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
  119. port {
  120. hdmi_0: endpoint@0 {
  121. remote-endpoint = <&lcdc_0>;
  122. };
  123. };
  124. };
  125. };
  126.  
  127. /* TODO: I2C2 Pinmux */
  128.  
  129. &i2c2 {
  130. #address-cells = <1>;
  131. #size-cells = <0>;
  132. pinctrl-names = "default";
  133. pinctrl-0 = <&i2c1_pins>;
  134. pinctrl-0 = <&i2c2_pins>;
  135. status = "okay";
  136. adau1761_audio: adau1361@38 {
  137. compatible = "adi,adau1761";
  138. reg = <0x38>;
  139. status = "okay";
  140. };
  141. };
  142.  
  143. &mcasp0 {
  144. pinctrl-names = "default";
  145. pinctrl-0 = <&mcasp0_pins>;
  146. // pinctrl-1 = <&mcasp0_pins_sleep>;
  147. status = "okay";
  148. op-mode = <0>; /* MCASP_IIS_MODE */
  149. tdm-slots = <2>;
  150. serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
  151. 1 0 2 0
  152. >;
  153. tx-num-evt = <1>;
  154. rx-num-evt = <1>;
  155. };
  156.  
  157. / {
  158. // clk_mcasp0_fixed: clk_mcasp0_fixed {
  159. // #clock-cells = <0>;
  160. // compatible = "fixed-clock";
  161. // status = "okay";
  162. /* clock-frequency = <24576000>; */
  163. // clock-frequency = <12288000>;
  164. // };
  165.  
  166. // clk_mcasp0: clk_mcasp0 {
  167. // #clock-cells = <0>;
  168. // compatible = "gpio-gate-clock";
  169. // clocks = <&clk_mcasp0_fixed>;
  170. // enable-gpios = <&gpio1 27 1>; //BeagleBone Black Clk enable on GPIO1_27
  171. // status = "okay";
  172. // };
  173. //
  174. hdmi_audio: hdmi_audio@0 {
  175. compatible = "linux,hdmi-audio";
  176. status = "disabled";
  177. };
  178.  
  179. sound {
  180. /*compatible = "ti,beaglebone-black-audio";
  181. ti,model = "TI BeagleBone Black";*/
  182. /* ti,audio-codec = <&hdmi_audio>; */
  183. compatible = "adi,adau1761-evm-audio";
  184. adi,model = "ADI ADAU1761";
  185. adi,audio-codec = <&adau1761_audio>;
  186. adi,mcasp-controller = <&mcasp0>;
  187. adi,codec-clock-rate = <12288000>;
  188. status = "okay";
  189. //clocks = <&clk_mcasp0>;
  190. //clock-names = "mclk";
  191. adi,audio-routing =
  192. "LHP", "Headphone Jack",
  193. "RHP", "Headphone Jack",
  194. /* "LAUX", "Line In",*/
  195. /* "RAUX", "Line In",*/
  196. /* "DAC_SDATA", "Line In",*/
  197. "ROUT", "Line Out",
  198. "LOUT", "Line Out";
  199. };
  200. };
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